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Frontiers in Digital and Custom Design
Frontiers in Digital and Custom Design Blog
The first of this two-part post will explore the problems facing designers working on SoCs targeting energy-efficient design, and how Synopsys’ PrimeShield™ technology can help optimize designs for lower power while achieving aggressive time-to-market goals.
I’m always excited to hear stories from customers that are deploying advanced techniques with Custom Compiler™ to improve their productivity.
As the HPC industry is moving towards a heterogeneous computing model, Synopsys and NVIDIA engineers have been working together to use GPUs to accelerate circuit simulation technology.
The Artificial Intelligence (AI) track at the 2021 event offers a real mix of insights and various aspects of AI-based design, the challenges and successes, and in many cases, a much better, efficient way of incorporating strategies and methodologies.
We have an incredible lineup! There are 200+ technical presentations, tutorials and panels across 18 technology tracks
We have an incredible lineup! There are 200+ technical presentations, tutorials and panels across 18 technology tracks
Criteria for devices tested continually changes. How can you turn worst-case scenarios into best case scenarios when designing an SoC?
PPA targets are pre-defined values driven by multiple static metrics, including clock and data path timing, power consumption at specific voltage levels and floorplan sizes and shapes.
Archives
- Making IC Test Faster and More Accessible: Part 1 - October 2020
- Parasitic Extraction Requirements Driven by Custom Design - July 2020
- Machine Learning Everywhere - June 2020
- The Need for 3D IC Packaging and Design Evolution - May 2020
- AI Chips Driving Need for the New Test Implementation Methodologies - December 2019
- EDA Forms the Basis for Designing Secure Systems - March 2019
- MISing in Signoff - February 2019
- A Paradigm Shift With Vertical Nanowire FETs for 5nm and Beyond - December 2018
- Physical Verification in the Cloud - November 2018
- Is Synthesis Still Process-Independent? - September 2018
- It's All About Staying Ahead of the Test Challenges Curve - August 2018
- "Good Enough for Government Work?" - July 2018
- Design Flows at 5nm and Beyond - May 2018
- In-Design Rail Analysis is a Beautiful Thing - April 2018
- Regain Your Power With Machine Learning - March 2018
- 3D Extraction Necessities for 5nm and Below - February 2018