The DesignWare® ARC® Processor IP portfolio consists of proven 32-bit CPU and DSP cores, subsystems and software development tools. ARC processors are supported by a broad spectrum of 3rd-party tools, operating systems and middleware from leading industry vendors enrolled in the ARC Access Program, as well as a comprehensive suite of free and open source software available through the embARC Open Software Platform.
Synopsys offers the ASIP Designer tool for automating the design and implementation of application-specific instruction-set processors (ASIPs). ASIP Designer enables designers to create custom processors and programmable hardware accelerators for specialized processing requirements.