Synopsys I/O Library IP

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Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic libraries, and I/O solutions, extensively proven in silicon with billions of units shipping in volume production.

Synopsys I/O Library IP provides designers with the input/output operations, functionality and reliability required for their systems targeting mobile, automotive, and high-performance computing (HPC) applications. The IP is silicon proven and is available in multiple foundries and process technologies from 3nm to 22nm. 

Synopsys' I/O portfolio includes robust general-purpose I/Os (GPIOs) and specialty I/Os (LVDS, SD/eMMC, I2C, and I3C) helping designers achieve power, performance, and area (PPA) targets for their SoCs, with low risk and fast time-to-market.

Synopsys I/O Libraries offering includes support to multiple I/O bus protocols. Synopsys I/O Libraries enable Industry’s most comprehensive supply voltage range and have robust ESD for improved manufacturability (configurable CDM specs). Synopsys I/Os operate at very high operating frequencies and include the broadest set of features supporting flexible system design. These features include independent power sequencing, fail-safe/fail-tolerance features, programmable current drive with enhanced granularity, slew control, retention, and bus-keeper support.  

Synopsys I/O Libraries are self-sufficient and include all the required functional cells – GPIO, supply cells, core clamps, power management cells, and supporting cells s (supply, corner spacers, diode breakers, oscillators, terminators). The multi-row ring implementations & unified I/O framing help in overall area optimizations. Synopsys I/O Library IP supports multiple metal stack options and optimizes partner customization as requested. 

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