Cloud native EDA tools & pre-optimized hardware platforms
When receiving a faint signal from a satellite hundreds of kilometers above us, the RF Low Noise Amplifier (LNA) must have very low noise and high gain. When making a call in a moving vehicle, the RF circuits must perform in a dynamically changing environment to maintain safety and connection quality. To facilitate development of high-performance RF ICs, Synopsys Custom Design Family of products, including PrimeSim Continuum, provides support of advanced semiconductor technology node PDKs, including FinFET 16nm~3nm nodes as well as SOI (Silicon on Insulator) and SiGe (Silicon Germanium) technology nodes. PDKs and RF Reference Flows are provided by foundry partners for use in designing RF ICs.
To achieve superior RF performance, the RF transistor and inductor p-cells offered in a foundry PDK may need to be further customized to get the extra gain, power or Q-factor. Synopsys Custom Compiler supports user-defined devices to achieve the extra performance, and supports layout re-use with templates to for high productivity. The quality factor of inductive elements is key to achieve superior RF circuit performance. Custom Compiler integrates the industry leading VeloceRF tool from Ansys for the synthesis of high-Q inductors and low loss transmission lines on a given technology node, including single-ended and differential spiral inductors and transformers of square or octagonal shapes, with or without center taps. Transmission lines such as CPW, Microstrip, Stripline, shielded or non-shielded, can also be synthesized.
Many RF circuits are used in mission-critical applications where high safety and reliability must span the entire silicon lifecycle. The combination of high current and shrinking dimensions of RF transistors and inductors leads to higher current density with power dissipation. This creates issues of electromigration and heat generation leading to circuit reliability risk.To address potential reliability issues early on, PrimeSim Reliability analysis provides fast in-design and chip level electromigration/IR (EMIR) analysis, as well as production-proven and foundry-certified technologies such as high-sigma Monte Carlo, MOS aging to enable full lifecycle reliability verification.
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In Part I we introduce an RF design flow based on Synopsys Custom Design Family which is tightly integrated with Ansys EM solutions. This video describes specification of a LNA amplifier and demonstrates synthesis of the LNA inductor layout.
In Part 2 we will demonstrate EM modeling of inductors using Ansys RaptorX and then demonstrate Synopsys PrimeSim RFIC simulation results analysis using the PrimeWave Design Environment within Custom Compiler.
In Part 3 of this video series, we provide an overview of custom layout solutions, show post layout verification demonstrating DRC vs. LVS validation, sign-off of EM modeling, and demonstrate final RFIC simulation results within Custom Compiler.