Synopsys Foundation IP

Foundation IP is a set of fundamental, pre-designed, and verified components for chip design that enables the creation of complex SoCs by providing essential building blocks like standard cells, embedded memories, I/O libraries, and power management features. These IP blocks reduce integration risk, accelerate time-to-market, improve reliability, and optimize key performance metrics such as power, performance, and area (PPA). Learn more

Foundation IP provides essential, optimized building blocks, such as standard cells and memory compilers, for creating functional and efficient chips, reducing development time, improving reliability and power efficiency, minimizing area, and helping designers meet performance targets for complex SoCs. Learn more

Synopsys offers the industry’s most comprehensive, differentiated, and silicon-proven Foundation IP portfolio—spanning Embedded Memories, Logic Libraries, IOs, and NVM. With billions of units shipped in volume production, our high-quality IP helps SoC designers minimize risk and accelerate time-to-market for HPC/data center, AI, storage, mobile, consumer, microcontroller, AIoT, automotive, and industrial applications. Learn more

The Synopsys Embedded Memory IP offers configurable embedded and specialty compilers. The embedded SRAM compilers include high-speed, high-density, ultra-high density, and extreme high-density architectures and are enhanced to generate memories with the absolute minimum area and power, enabling designers to achieve aggressive critical path requirements. Synopsys specialty compilers—including MRAM, RRAM, and TCAM—help support high-performance, low-power SoC requirements for new and emerging markets.

Synopsys Logic Libraries deliver high-speed, high-density, and low-power Standard Cells for diverse SoC designs. The Synopsys Library IP also include Ultra Low Leakage Libraries, POKs and ECO Kits, supporting advanced nodes and leading foundries. Multiple architectures, voltage thresholds, and channel lengths enable designers to optimize speed, area, and power for their SoCs. Learn more

Synopsys IO Library IP provides designers with the input/output operations, functionality and reliability required for their systems targeting mobile, automotive, HPC and GPU applications. Synopsys' IO portfolio includes robust general-purpose IOs (GPIOs), and specialty IOs (High-Speed Test IO, 3DIO, LVDS, SD/eMMC, I2C, I3C, Crystal Oscillator and xSPI), helping designers achieve PPA targets for their SoCs with low risk and fast time-to-market. Learn more

To help you find the best Foundation IP solutions for your SoC design needs, simply select your desired foundry and process node in the Foundation IP Selector

Synopsys Foundation IP delivers optimal PPA for competitive differentiation. Highly customizable and application-specific, it is co-optimized with EDA tools, extensively characterized for broad operational ranges, and supported by expert technical help to speed implementation and time-to-market. Read white paper

Synopsys HPC Design Kit is a suite of high-speed, high-density memories and logic libraries that enable SoC designers to optimize processor cores for maximum speed, minimal area, lowest power, or an optimal balance of these factors for their specific application. With optimized standard cells and SRAMs, the HPC Design Kit allows designers to enhance all processors on an SoC using a single package, reducing design costs and improving time-to-market. Read article

Synopsys High-Speed Test IO IP enables efficient, high-speed testing of complex chips with minimal hardware and cost. Supporting up to 2.5Gbps, it reuses package pins for multiple test modes, eliminates complex protocols, simplifies testing, reduces development time, and ensures high coverage for advanced designs. Read article

Synopsys 3DIO IP Solution is a specialized IO for multi-die integration. It includes multiple IP offerings for SoC designers to implement tunable, integrated multi-die design structures targeting HPC (AI), GPU, CPU, and mobile applications. Designed for 2.5D, 3D, and SoIC packages, it supports u-BUMP/TSV, offers synthesizable, source synchronous, and PHY IP, and accelerates time-to-market with optimized PPA. Read article

Synopsys NVM IP offers OTP, FTP, and MTP memories from 16 bits to 1 Mbit in standard CMOS, BCD, high voltage, and specialty technologies—no extra masks needed. It delivers industry-leading reliability, up to 1,000,000 cycles, 175ºC operation, and ultra-low power. Selected IP meets AEC-Q100 Grade 0/1 standards and is rigorously tested for quality and reliability. Select NVM IP by Foundry & Process Technology