IC Validator is a comprehensive and productivity boosting signoff physical
verification solution improving productivity for customers at all process nodes from
mature to advanced. IC Validator offers the industry’s best distributed processing
scalability to over 2000 CPU cores. The tool’s performance and scalability has
enabled some of the industry’s largest reticle limit chips with billions of transistors,
same day design rule checking (DRC), layout versus schematic (LVS), and dummy fill
IC Validator physical verification is seamlessly integrated with Fusion Compiler™ RTL-to-GDSII solution and IC Compiler® II place and route system in the Fusion Design Platform. This integrated fusion technology accelerates design closure for manufacturing by enabling independent signoff-quality analysis and automatic repair within the implementation environment.