VC Verification IP for MIPI

Synopsys Verification IP for MIPI provides a complete solution for verification of MIPI protocols that support mobile, multi-media, IoT, chip to chip and control data designs. Synopsys VIP is based on native SystemVerilog UVM architecture, offering ease-of-use, ease-of-integration and high performance. Synopsys VIP includes built in verification plans, coverage and checking to accelerate coverage closure, as well as source code SystemVerilog-based compliance test suites for key protocols enabling teams to quickly jumpstart their own custom testing.

As an active contributor to the MIPI Alliance working groups, Synopsys continues to play a key role in supporting the mobile ecosystem by developing high-quality, interoperable MIPI VIP that enable designers to verify new features in their next-generation mobile devices.

MIPI VC Verification IP

MIPI

I3C  | PDF

LLI  |  Request

M-PHY®  |  PDF

RFFE  |  PDF

SLIMBus®  |  Request

SoundWire  |  PDF

SPMI  |  PDF

UniPro  |  PDF

UFS  |  PDF

C-PHY  |  PDF

CSI-2  |  PDF

CSI-3  |  Request

DBI2  |  PDF

DigRFv4  |  PDF

D-PHY  |  PDF

DPI2  |  PDF

DSI  |  PDF

HSI  |  PDF