Synopsys' PrimeTime static timing analysis tool provides a single, golden, trusted signoff solution for timing, signal integrity, power and variation-aware analysis. It delivers HSPICE® accurate signoff analysis that helps pinpoint problems prior to tapeout thereby reducing risk, ensuring design integrity, and lowering the cost of design. This industry gold-standard improves your team’s productivity by delivering fast turnaround to shave precious time from development schedules for large and small designs while ensuring first-pass silicon success through greater predictability and the highest accuracy.
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PrimeTime Static Timing Analysis
Golden Signoff
The PrimeTime® Suite delivers fast, memory-efficient scalar and multicore computing, distributed multi-scenario analysis and ECO fixing using variation-aware CCS modeling.
The PrimeTime Suite includes:
PrimeTime SI
- Core static timing analysis
- Multi-scenario analysis
- Crosstalk delay and signal integrity analysis
- Constraint consistency checking
- Hierarchical analysis
PrimeTime ADV
- Physically-aware ECO guidance for timing, DRC and power recovery
- Parametric on-chip variation (POCV)
- Distributed hierarchical analysis
- Derate based Multi-Input Switching support
PrimeTime ADVP
- Wire, Via variation, and Layout proximity effects
- Enhanced statistical models (Moments)
- Advanced Multi-Input Switching support
- Machine Learning based Power recovery and PBA
- Simultaneous Multi-voltage Analysis with DVFS
- Routability aware ECO with support for 6/5nm rules
