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Static Timing Analysis
Golden, Trusted Signoff
The PrimeTime Suite delivers fast, memory-efficient scalar and multicore computing, distributed multi-scenario analysis and ECO fixing using variation-aware CCS modeling.
Golden Signoff Solution
Synopsys' PrimeTime static timing analysis tool provides a single, golden, trusted signoff solution for timing, signal integrity, power and variation-aware analysis. It delivers HSPICE® accurate signoff analysis that helps pinpoint problems prior to tapeout thereby reducing risk, ensuring design integrity, and lowering the cost of design. This industry gold-standard improves your team’s productivity by delivering fast turnaround to shave precious time from development schedules for large and small designs while ensuring first-pass silicon success through greater predictability and the highest accuracy.
The PrimeTime Suite includes:
PrimeTime
- Core static time analysis
- Multi-scenario analysis
PrimeTime SI
- Crosstalk delay and signal integrity analysis
- Constraint consistency checking
- Hierarchical analysis
PrimeTime ADV
- Physically-aware ECO guidance for timing, DRC and power recovery
- Parametric on-chip variation (POCV)
- Distributed hierarchical analysis
PrimeTime PX
- Static and Dynamic Power Analysis
Key Benefits
- HSPICE-accurate results minimize over-design
- Integrated design environment improves productivity
- Fast turn-around time speeds analysis and signoff
- High capacity approach reduces hardware costs
- Multi-scenario ECO accelerates timing closure and power recovery
- Fast, flexible, timing constraint consistency checking
- Accurate analysis of latch based designs
- Latest on-chip variation modeling technology accelerates timing signoff
- Complete solution ensures comprehensive signoff
Technology
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