Improving design robustness, power and performance

Industry’s First & Most Accurate Machine Learning-driven Design Robustness Solution

The PrimeShield™ solution provides design robustness analysis and optimization at advanced nodes and enables designers to effectively improve design robustness in face of escalating process and voltage variability. It enables designers to reduce design power and boost frequency by minimizing over-pessimism, over-margin and over-design while ensuring design safety. 

PrimeShield can rapidly identify and drive optimization of bottlenecks at the stage, path and design level that are sensitive to variations such as supply voltage drops or manufacturing variability. The patented fast statistical methods and breakthrough machine learning technology are used to firmly establish design robustness analysis as a method to minimize failure and maximize power, performance and area (PPA).  PrimeShield delivers 100X-10,000X faster design robustness analysis and optimization than existing solutions. It is scalable to volume production system- on-chips (SoCs) with billions of transistors, while using industry standard inputs for immediate deployment.

Key Benefits

Improved Robustness
Identifies and optimizes critical bottleneck cells delivering improved design robustness
Maximize PPA
Reduces pessimistic timing margins to recover and maximize PPA for High-Performance & Low-Power designs
Faster Reliable Results
ML-Fast Monte Carlo methods minimizes failures, delivers up to 10,000X faster HSPICE accurate for high-sigma/automotive applications

As part of the Fusion Design Platform™ PrimeShield delivers silicon designs that are faster, lower power, more robust and more cost-effective.

The PrimeShield innovative fast statistical engine uniquely leverages the core engines of the industry’s gold-standard PrimeTime® signoff and HSPICE® simulation tools. It overcomes the turnaround time challenges that previously prohibited full statistical design variation analysis with machine learning technologies, enabling analysis and optimization for every design of any size.

Accelerated by machine learning technology, the PrimeShield solution performs fast Monte Carlo statistical simulation on critical timing paths with HSPICE accuracy within minutes, versus days or weeks required by full statistical simulations. Its patented design variation analysis with statistical correlation modeling enables analysis and optimization on large-scale SoCs with billions of cells, an analysis previously feasible only for a few dozen cells.


POST SILICON DIGITAL DESIGN SYSTEM DESIGN FUSION DESIGN PLATFORM Monitor IP Monitor device fabrication, process variability and in-field dynamically changing conditions with Synopsys' IP solutions SiliconDash Data analytics for high-volume semiconductor manufacturing and test Yield Explorer Data-centric Yield Management PrimeTime The industry standard for timing and signal-integrity analysis and signoff StarRC The EDA industry’s gold standard for parasitic extraction PrimePower RTL-to-signoff power analysis PrimeLib Accurate and comprehensive library characterization for successful digital implementation Tweaker ECO The industry's first and only complete ECO platform IC Validator NXT The industry leading physical verification Formality ECO A new way of doing functional ECOs RedHawk Analysis Fusion Unique In-design power-integrity analysis and fixing PrimeShield Design robustness analysis and fixing for resiliency, power and performance Formality Design and validate with confidence with the best verifiable QoR / , Fusion Compiler The Industry’s only fully integrated RTL-to-GDSII design system IC Compiler II The industry’s leading place-and-route solution Design Compiler NXT Next-generation Design Compiler RTL Architect The industry’s first physically-aware RTL analysis, exploration, and optimization system with signoff technology integration TestMAX Innovative, next-level test and diagnosis capabilities for advanced SoC design Signoff Fusion Converge to the best PPA, faster, through unique Fusion technology Test Fusion Converge to the best PPA, faster, through unique Fusion technology 3DIC Compiler The industry's first unified platform for advanced multi-die system design and integration Machine learning offers opportunities to enable self-optimizing design tools Better PPA with RTL-to-Signoff flow in the cloud Hover for more details

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