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DesignWare IP for Amazing AI

Optimized Processors, Memories, and Interface IP

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Supporting Your Artificial Intelligence SoC Architecture Requirements

Specialized Processing
Memory Performance
Real-Time Data Connectivity
Specialized Processing + -
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Specialized Processing

Processors to manage massive and changing compute requirements for machine and deep learning tasks. 

  • Embedded Vision Processors support heterogeneous compute and high-performance convolutional neural networks (CNNs)
  • Efficient ARC Processors provide scalar and vector capabilities and customizable APEX accelerators; tightly coupled memories alleviate bottlenecks; ARC Subsystems enable key AI functions 
  • ASIP Designer supports custom processing with parallelism and specialized datapath elements
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Memory Performance + -
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Memory Performance

IP solutions to support efficient architectures for different memory constraints including bandwidth, capacity, cache coherency. 

  • DDR IP addresses capacity needs 
  • HBM2 IP addresses the bandwidth bottleneck 
  • CCIX enables cache coherency with virtualized memory capabilities for heterogeneous computing and reduced latency
  • Foundation IP provides a wide array of embedded memories, logic libraries, TCAMs, and multi-port memories, with high density, low leakage, and high performance options 
Real-Time Data Connectivity + -
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Real-Time Data Connectivity

Synopsys provides reliable connectivity to CMOS image sensors, microphones, and motion sensors for AI applications including vision, natural language understanding, and context awareness.

  • IP in advanced FinFET technologies reduce power
  • Broad portfolio of silicon-proven IP support the most widely used interfaces such as MIPI, USB/Display Port, HDMI, PCI Express, CCIX, Ethernet, etc.
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Watch Video: DesignWare IP for Amazing AI SoCs

Recent innovations in deep learning algorithms and neural network processing is driving new technology requirements for artificial intelligence (AI) SoCs. Deep learning capabilities are being added to SoCs across all markets including mobile, IoT, data center, automotive, and digital home. Synopsys’ silicon-proven DesignWare IP portfolio is addressing the diverse processing, memory, and connectivity requirements of each market.

Video

Synopsys & Samtec PCIe 6.0 Interoperability

DesignWare PHY IP for PCIe 6.0, performing at maximum channel loss, with Samtec's connectors in a configurable, GPU-based AI/ML system.

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White Paper
DesignWare CXL IP

The Growing Market for Specialized AI IP in SoCs

As AI capabilities enter new markets, the IP selected for integration is providing the critical components of an AI SoC.

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Webinar

AI SoC Architectures for Edge Computing

Join this webinar to get insights that will help you make decisions on your next AI SoC architecture.

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More Artificial Intelligence IP Resources

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