Synopsys provides the industry's broadest portfolio of silicon-proven DesignWare® Memory Compilers and Logic Libraries supporting a wide range of foundries and process technologies from 250-nm to 28-nm. Optimized for low power, high performance and high density, DesignWare Memory Compilers offer advanced power management features such as light sleep, deep sleep, shut down and dual power rails, allowing designers to meet the stringent low-power requirements of today's system-on-chips (SoCs).
DesignWare Memory Compilers are closely coupled with the DesignWare STAR Memory System™, providing an integrated embedded memory test solution to detect and repair manufacturing faults for the highest possible yield. DesignWare Memory Compilers are silicon-proven with billions of chips shipping in volume, enabling designers to reduce risk and speed time-to-market.
|High-Density Memory Compilers
||High-Speed Memory Compilers
||Ultra High-Density Memory Compilers
||High Capacity 16 Mb Single-Port SRAM
||Two-Port Register Files
||Asynchronous Two-Port Register File
DesignWare Duet Embedded Memories and Logic Libraries Datasheets
16FF+ -TSMC Datasheet
- Billions of chips shipped with Synopsys DesignWare Memory Compilers
- Multiple operating PVTs supported including temperature inversion corners
- Multiple power management modes to enable low power states with data retention and complete shut down without retention
- Integrated memory test and repair capability