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DesignWare Technical Bulletin
In-depth technical articles, white papers, videos, webinars, product announcements and more
Ethernet IP
Hyperscale Data Centers Driving 400G Ethernet Interconnects
Explore the different types of Ethernet interconnects and PHY technologies for network architectures operating at 400 Gb/s and beyond.
Learn More
Foundation IP
Designing Integrated ADAS Domain Controllers SoCs
See how automotive-ready logic libraries and embedded memory compilers accelerate integrated ADAS domain controller SoC development.
Learn More
ARC Zone
High-Performance DSP and Control Processing for 5G Requirements
Learn why processors with a RISC + DSP architecture offer the flexibility, and reduce power consumption to address modern DSP challenges.
Learn More
OTP NVM
Security and Reliability with OTP Non-Volatile Memory
Read about the key advantages of OTP NVM and why it’s the most secure and reliable embedded NVM solution for a wide range of applications.
Learn More
Security IP
Minimize Security Vulnerabilities in Connected Cars
Learn why security must be designed into automotive SoCs from the hardware level to help mitigate attacks.
Learn More
ARC Processors
High-Performance Solutions for Next-Generation SSDs
Discover how the use of AI in storage can increase endurance and reliability, while supporting object detection, tracking, and classification.
Learn MoreVideos
- DesignWare 56G Ethernet PHY IP for 400G Hyperscale Data Centers
- Percepio Tracealizer Profiles OpenVX Applications on ARC EV6x Vision Processors
- PathPartner Demo of CNN-based Face Recognition at ARC Summit 2018
- Truphone Demonstrates eSIM Operating System Running on DesignWare tRoot Fx Hardware Secure Module
- High-Performance NVMe Solution with Synopsys and EpoStar
Articles
- Tech Design Forum: Why AI Needs Security
- Tech Design Forum: Synopsys Takes TSMC Design into the Cloud; IP to 7nm, 5nm and Automotive Processes
- Tech Design Forum: Using Threat Models and Risk Assessments to Define Device Security Requirements
- SemiEngineering: Data Converters for Automotive Applications
- Tech Design Forum: An Open-source Framework for Greater Flexibility in Machine-Learning Development
- Tech Design Forum: 56G Ethernet IP to Enable Leaf-spine Hyperscale Data Centers
- Tech Design Forum: Managing the Evolving Architecture of Integrated ADAS Controllers
- EECatalog: Heads Up on USB 3.2 and USB Type-C
- Embedded Vision Alliance: Computer Vision for Augmented Reality in Embedded Designs
- SemiWiki: Networking Trends for Automotive ADAS Systems
- SemiEngineering: Impact Of IP On AI SoCs
- SemiEngineering: Is Your AI SoC Secure?
- SemiWiki: DesignWare IP as AI Building Blocks
- SemiWiki: Synopsys Seeds Significant SIM Segue
- dspvalley: Riken Develops Custom Processor with Synopsys’ ASIP Designer tool
- Tech Design Forum: Flexible Embedded Vision Processing Architectures for Machine-Learning Applications
- ChipEstimate: The DNA of an Artificial Intelligence SoC
- Tech Design Forum: Synopsys Catalogues AI IP
News
- Synopsys Enhances DesignWare Memory Test and Repair Solution for Embedded MRAM
- Synopsys Announces Fastest, Most Power Efficient DDR5 and LPDDR5 IP Solutions
- Synopsys Targets 400G Hyperscale Data Centers with High-Performance Ethernet IP
- Artosyn Selects Synopsys DesignWare Security IP for Drone SoC
- Synopsys Announces Support for the Open Neural Network Exchange Format in ARC MetaWare EV Development Toolkit
- Synopsys, Customers & Partners to Present the Latest Trends and Technologies in Embedded Processor Solutions - ARC Processor Summit
- New Synopsys HPC Design Kit Delivers Superior Performance, Power, and Area Efficiency for DesignWare Embedded Vision Processor IP
- Synopsys and Truphone Enable Secure Over-the-Air Provisioning with Integrated SIM IP and Managed Services Solution
- LG Electronics Selects Synopsys HDMI 2.1 IP with HDCP 2.3 Content Protection to Deliver Immersive Viewing Experiences
- Synopsys and TSMC Collaborate to Develop Portfolio of DesignWare IP for TSMC N7+ FinFET Process
- Synopsys Delivers Automotive-Grade IP in TSMC 7-nm Process for ADAS Designs
- TSMC Recognizes Synopsys with Four Partner Awards at the Open Innovation Platform Forum Event
- Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instruction-Set Processors for STMicroelectronics
- Synopsys Announces Fastest, Most Power Efficient DDR5 and LPDDR5 IP Solutions