Simulation

High Performance Simulation

Synopsys' high-performance simulation products help engineers find design bugs faster and achieve timely coverage convergence to create high-quality designs.

Industry-leading High-performance RTL Verification Accelerates Innovation

Increases in the size and complexity of today's SoCs have intensified the challenges of verification. Meeting these challenges requires advanced technologies and methodologies that ensure the highest design quality. The Synopsys suite of functional verification solutions are tightly integrated, best-in-class technologies that allow designers to find bugs quickly and easily, significantly improving the quality of the most complex designs and enabling first-pass silicon success. These tools include VCS, the functional verification solution used by leading SoC teams; VCS Xprop for X-propagation support for X-related simulation and debug; Verdi, the Industry's best-in-class debug platform for design and verification; ZeBu, the industry's performance and capacity leader in emulation; VC Verification IP, the industry's next-generation VIP; VCS NLP and VC LP for native low power simulation and low power rule checking; VC Formal Coverage Analyzer, for integrated formal analysis and coverage closure; Certitude, for overall verification suite quality measurement and debug; VC Formal for next-generation property checking, SoC connectivity checking and sequential equivalency checking; and HECTOR, for transaction-accurate C/C++/SystemC to RTL functional equivalence checking.

Key Benefits

  • High-performance and high-capacity simulation, advanced testbench automation, assertion verification, coverage analysis and SystemVerilog support in a single product
  • Most effective solution to find more bugs in less time
  • Based on industry standards to secure your verification investments

Tools