Cloud native EDA tools & pre-optimized hardware platforms
Synopsys' comprehensive high-speed SerDes IP portfolio with leading power, performance, and area, allows designers to meet the efficient connectivity requirements of high-performance computing SoCs for hyperscale data center, networking, and storage applications.
224G Ethernet PHY IP and 112G Ethernet PHY IP enable true long reach channels for up to 800G/1.6T high-performance computing SoCs
56G Ethernet PHY IP addresses reach and performance of up to 400G Ethernet applications
Die-to-Die PHY IP for UCIe and 112G XSR
Multi-Protocol PHYs supports Ethernet, PCI Express, CCIX, CXL and more protocols
PCI Express PHY IP enables high-performance, power-efficient connectivity for up to 64GT/s SoCs on advanced FinFET processes
Webinar: The Path to 1.6TbE with 224G Ethernet PHY IP
Webinar: Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges
Webinar: PCIe 6.0 From IP to Interconnect in High-Performance Computing
Webinar: Keeping Latency to a Minimum with 400G/800G Ethernet IP
Webinar: Achieving Low Latency Die-to-Die Connectivity Using a Single Controller and PHY IP Solution
Webinar: PCI Express 6.0 Design Considerations & IP Implementation
First CXL 2.0 IP Interoperability Demo with Compliance Tests
Synopsys 224G & 112G Ethernet PHY IP OIF Interop at ECOC 2022
Synopsys 112G Ethernet PHY IP on TSMC N5 Performance Results
PCIe 6.0 End-to-End Hardware Linkup and Performance
Synopsys 112G Multi-Protocol PHY IP and Amphenol 2m DAC & Examax Interoperability
Synopsys Accelerates First-Pass Silicon Success for Banias Labs' Networking SoC
100G Ethernet IP for Edge Computing
Reduce Integration Risks for High-Speed Applications with PCIe 5.0-Compliant Synopsys IP
Synopsys IP Achieves Broad Industry Adoption on TSMC's N5 Process
Synopsys Completes Acquisition of MoreThanIP