Synopsys Die-to-Die IP Solutions

Synopsys enables multi-die designs with a comprehensive die-to-die IP solution that includes Universal Chiplet Interconnect Express (UCIe) and 112G XSR controller, PHY, and verification IP. The UCIe PHY, adopted by leading companies, offers a flexible architectrue to meet the stringent needs of diverse applications. The IP has achieved several silicon successes across multiple foundry processes. Operating at up to 64Gbps, it delivers maximum die-edge and power efficiency, low latency, and support for standard and advanced packaging technologies, while being compliant with the latest UCIe specification. The UCIe controller enables an ultra-low latency link between dies based on popular protocols to ensure interoperability. The Synopsys 112G XSR IP leverages high-speed SerDes technology for extra short reach links. The XSR controller includes a highly optimized FEC for a reliable, low latency link between dies.