The Synopsys USR/XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modules (MCMs) for hyperscale data center, AI, and networking applications. The low-latency, low-power, and compact PHY supports NRZ and PAM-4 signaling from 2.5G to 112G data rates and is compliant with the OIF CEI-112G and CEI-56G standards for ultra-short reach (USR) and extra- short reach (XSR) links. The USR/XSR PHY offers flexible layout for maximum bandwidth per die-edge by allowing placement of the square macros along all edges of the die. It deploys 16-lane transmit and receive macros for optimized segmentation on the multiple dies. The robust DLL-based clock forwarded architecture enables high energy efficiency while supporting reliable links of up to 50 millimeters for large MCMs. The PHY enables multi-die connectivity over organic substrates, which helps reduce packaging costs without requiring advanced interposer-based packaging over shorter distances. The embedded bit error rate (BER) tester and nondestructive 2D eye monitor capability provide on-chip testability and visibility into channel performance. Besides the PMA and PMD, the PHY includes a raw-PCS to facilitate the interface with the on-chip network, regardless of the existing networking protocol. The USR/XSR IP is combined with Synopsys’ comprehensive routing feasibility analysis, packages substrate guidelines, signal and power integrity models, and crosstalk analysis for fast and reliable integration into SoCs.
Additional resources:
Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N5 X16, North/South (vertical) poly orientation | STARs | Subscribe |
Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N6 X16, North/South (vertical) poly orientation | STARs | Subscribe |
Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N7 X16, North/South (vertical) poly orientation | STARs | Subscribe |
Description: | Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N5 X16, North/South (vertical) poly orientation |
Name: | dwc_d2d_sr112_phy_tsmc5ff_x16ns |
Version: | 2.00a |
ECCN: | 5E991/NLR |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Cores |
Documentation: | |
Download: | dwc_d2d_sr112_phy_tsmc5ff_x16ns |
Product Code: | E474-0 |
Description: | Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N6 X16, North/South (vertical) poly orientation |
Name: | dwc_d2d_sr112_phy_tsmc6ff_x16ns |
Version: | 2.00a |
ECCN: | 5E991/NLR |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Cores |
Documentation: | |
Download: | dwc_d2d_sr112_phy_tsmc6ff_x16ns |
Product Code: | F335-0 |
Description: | Die-to-Die, 112G Ultra-Extra Short Reach PHY Ported to TSMC N7 X16, North/South (vertical) poly orientation |
Name: | dwc_d2d_sr112_phy_tsmc7ff_x16ns |
Version: | 2.00b |
ECCN: | 5E991/NLR |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Cores |
Documentation: | |
Download: | dwc_d2d_sr112_phy_tsmc7ff_x16ns |
Product Code: | E829-0 |