Sima and Synopsys Enable Multi-die based ADAS and IVI Applications

Sima and Synopsys recently announced collaboration offers automotive OEMs the ability to scale AI applications across multiple vehicle platforms ranging from entry level models to premium models.  AI is critical to automotive advanced driver assist (ADAS) applications ranging from automatic emergency breaking (AEB) to lane keep aid (LKA) and adaptive cruise control (ACC).  In addition, the amount of AI scales with the increase levels of autonomy as OEMs target level 2++ and level 3 autonomy applications moving to full self-driving level 4 and level 5.  AI is also being deployed in multiple In-Vehicle Infotainment (IVI) applications such as driver monitoring systems (DMS) and cockpit digital assistants using the latest generative AI (GenAI) such as ChatGPT or Deepseek.  While the automotive industry is adopting the latest AI algorithms for these applications, the EE architecture which integrates the automotive systems is evolving to the new centralized zonal architectures. The new centralized zonal architecture provides the capability to integrate further levels of AI in the centralized high performance compute modules.

As the adoption of central computing increases, those centralized compute modules require higher performance to manage increased complexity and run multiple simultaneous applications. As the centralized architecture is being adopted, automakers are also deploying their platforms at a faster pace shrinking the traditional 7-year OEM platform rollout to the shorter 3-years platform rollouts embraced by many of the new EV OEMs using the software defined vehicle (SDV) frameworks. 

So, how do you increase performance, manage complexity, lower power, and adapt to the constantly evolving AI algorithms using SDV techniques for the full range of OEMs’ entry-level, mid-level and premium vehicle lines with shrinking development schedules and lower cost? 

“The Sima-Synopsys joint effort highlights how automakers’ can modernize their hardware/software co-design processes to implement the in-car experiences that are increasingly costly and complex to deliver” as mentioned by Ravi Subramanian, Head of the Synopsys Product Management and Markets Group. By offering an efficient HW/SW co-design environment it will allow customers to adopt the quickly evolving AI algorithms and rapidly develop workload-optimized automotive machine learning SoCs and chiplets for ADAS & IVI applications. The collaboration provides a software-defined semiconductor architecture analysis and verification platform with an end-to-end workflow including architecture exploration, SW simulation, HW based emulation leading to the option to develop custom SoCs and chiplets. The purpose-built, high-performance architecture is based on Sima’s industry leading AI MLSoCs. This will allow customers to develop custom SoC or chiplets building upon Sima’s reference architecture utilizing IP building blocks sourced by both Sima and Synopsys.

To optimize SoC or chiplet architecture early, customers can use Synopsys Platform Architect (PA) tool which enables SoC/chiplet modeling for automotive software development ahead of silicon. PA tool can be used to optimize workload for LLM algorithm and memory bandwidth/capacity investigations. Further, Virtualizer Development Kit (VDK) for early SW development and pre-RTL performance analysis coupled with ZeBu for post RTL emulation to validate sub-system performance and power enable accelerated SDV system development. 

In parallel with early SW development, customers can plan a SoC or chiplet HW architecture based on Sima’s SoC reference design.  Using Sima’s full monolithic MLSoC as a starting point, the joint Sima-Synopsys collaboration can offer SoC and multi-die based options to customers seeking the highest level of flexibility for a scalable semiconductor strategy.

Automotive industries’ adoption of multi-die technology to design chiplet based semiconductors provides the path to minimize design effort, time and cost to implement the scalable systems which OEMs require.  Figure 2 shows how multi-die systems use a high-performance base die combined with connected AI and IVI accelerator chiplets. It provides single processing HW architecture and SW development environment to scale OEM platforms.  Designing high performance and complex FinFet based ADAS/IVI processors for custom automotive grade semiconductors require advanced expertise which can be costly. The cost and complexity can be minimized by designing many of the complex functions such as I/O data channels, DSP, application host processing into the base die and implementing the latest AI processing in the AI and IVI accelerator chiplets.

To obtain unique features in custom SoCs, customers can implement advanced functions into a predefined base die reference architecture consisting of UCIe die-die interface, advanced power and system management, debug trace, boot security for the Sima reference platform together with Synopsys IP. 

The Sima-Synopsys collaboration complements various multi-die chiplet architectures currently being investigated by multiple automotive industry initiatives such as the Automotive Chiplet Program² (ACP) lead by IMEC as part of the European Union efforts  and the Japan based Advanced SoC Research for Automotive³ (ASRA).  As chiplet based architectures are further defined by IMEC, ASRA, the UCIe Consortium’s automotive working group, and others, the adoption of UCIe based multi-die architectures are being planned for the next generation of scalable chiplet families to quickly expand AI for ADAS/AD and IVI applications.  Due to the multi-die based SoC architecture, AI chiplets can be upgraded quickly with no need to redesign the base die for every iteration enables accelerated design and development of a custom AI solution for automotive.

To implement a custom strategy, the automakers are looking to partner with technology leaders which offer the highest performance and lowest risk. By utilizing automotive grade interface (including UCIe interface IP), security, DSP processors and foundation IPs provided by Synopsys and Machine Learning Accelerator (MLA) AI IP and high-performance base die architecture provided by Sima, customers can achieve customized solutions for complex monolithic SoCs or multi-die designs. 

A comprehensive software suite is essential for automotive customers to identify, develop, train and deploy ML models. Given the plethora of ML models and the breakneck pace at which new models are being developed, a flexible architecture that allows customers to leverage the latest best-in-class models is critical. SiMa.ai’s Palette ™ SDK shown in Figure 3, enables customers to take any ML models in any format and compile them to run efficiently on the MLA. The SDK allows customers to get best accuracy for their data set while optimizing performance and power.

Figure 4 shows one option to use Sima’s customizable base die & AI chiplet architecture.

The Sima-Synopsys collaboration brings together industry leaders to provide customizable solution for complex monolithic SoCs or multi-die designs.  Customers can use Synopsys design services experts to work closely with Sima to implement and optimize the custom solution.  The Sima-Synopsys collaboration brings the fastest path to implement a scalable AI solution for automakers ADAS and IVI systems.