Cloud native EDA tools & pre-optimized hardware platforms
When creating an SoC design with existing IP, it is critical to rapidly configure and verify the IP in the targeted environment early in the design cycle. When designs are created using multiple IP blocks and a standard interface such as an on-chip bus like AMBA, designers need to be able to easily connect and configure multiple IP blocks to the bus and focus on the new logic in the design. With the Synopsys IP reuse tools, IP creators can package their IP in a format that will guide the IP integrator through the configuration, implementation, and verification of the IP and support IP re-use standards such as the IP-XACT specification from the SPIRIT Consortium. IP integrators can then create and begin verification of complex IP blocks and subsystems in hours not days -- greatly reducing the overall cycle time.