Cloud native EDA tools & pre-optimized hardware platforms
Synopsys acquires Silicon Frontline, the leading provider of electrical layout verification solutions, providing the best-in-class blind spot detection in the design of large-scale power semiconductor devices and ESD protection networks and providing accurate optimization and validation early in the cycle to ensure first silicon success.
Resistive 3D (R3D) provides extraction and simulation of power semiconductor devices to improve design efficiency and reliability. Resistance 3D Gate (R3D gate) offers transient analysis of gate networks. Equipped with high performance solver, Electro-THermal ANalysis (ETHAN) allows thermal floor planning and transient and Static 3D electro-thermal simulation of power device networks.
Efficient Power Semiconductor Devices – A Critical Success Factor for Today’s Low Power ElectronicsDownload Now
Verification of Metal Interconnects in ESD Protection Networks at Chip, Block, and Cell LevelDownload Now
Verification Methodologies for Domain Crossing and Transient Latch-up Damage PreventionDownload Now
Enablement, Evaluation and Extension of a CDM ESD Verification Tool for IC LevelDownload Now
Numerical Simulation of Metal Interconnects of Power Semiconductor DevicesDownload Now
Low-Cycle Fatigue of Multilayer Metal Stack Employed as Fast Wafer Level Monitor for Backend IntegrityDownload Now
RMAP – Software for Resistance Verification of Power Netsand ESD Protection StructuresDownload Now
Influence of Ti-Al(Cu) Backend Layer Scheme on Repetitive-Power-Pulsing RobustnessDownload Now
Accurate Capacitance and RC Extraction Software Tool for Pixel, Sensor, and Precision Analog DesignsDownload Now
Characterization & Monitoring Structures for Robustness Against Cyclic Thermo- mechanical StressDownload Now
Full Chip CDM Simulation With Package Layout Included for Connectivity and Charge DistributionDownload Now