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A Machine Learning-Based Approach To Formality Equivalence Checking
Automatically determining the right verification strategy based on the design characteristics that may present challenges.
Webinars
5X Faster Equivalence Checking with Formality ML-driven DPX
Speakers: Avinash Palepu, Synopsys and Mr. Woosung Choe, Samsung Electronics SLSI Division
Samsung: Comprehensive Real-Time Low-Power Equivalence Signoff Using Formality
Speakers: Ramanathan Lakshmanan, Samsung and Alphyn Stanley, Synopsys
ViaSat: Deployment of Formality at ViaSat with Lynx Integration
Speakers: Matteo Citarelli, ViaSat and Avinash Palepu, Synopsys
Broadcom: Best Verifiable QoR – A Formal Equivalence Checking Yardstick
Speaker: Sathappan Palaniappan, Principal Engineer, Broadcom
SNUG Papers
You will need a SolvNetPlus account to access these papers.
What R&D Says
Independent Guidance Based Verification
John Lehman, Director, Applications Engineering, articulates how users can enable aggressive optimizations in Synthesis but yet rapidly set up Equivalence Checking with minimal user intervention.
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Formality Equivalence Checking: Best Verifiable QoR….Up to 5X Faster
Todd Buzan, Senior Director of R&D, discusses how Formality enables aggressive optimizations in Synthesis to achieve maximal QoR.
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Introducing Formality Distributed Verification Technology
Phillip Baraona, Senior R&D Manager, discusses how Formality’s latest adaptive distributed verification technology delivers up to 5X faster turn-around time.
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