VC Verification IP for C-PHY

Synopsys VC Verification IP for MIPI Camera Serial Interface 2 (CSI-2) provides a comprehensive set of protocol, methodology, verification and productivity features enabling users to achieve rapid verification of MIPI CSI TX and RX devices. It supports data-type interleaving frames, normal frames and Virtual Channel ID interleaving frames. It simplifies testbench development by enabling engineers to use a single VIP to verify multiple transmission modes across the full CSI-2 protocol.

Protocol Features

Protocol Layer

  • CSI-2 Version 1.3
  • D-PHY 1.2
  • C-PHY 1.0
  • CSI-2 Transmitter, CSI-2 Receiver
  • Four virtual channels
  • All types of short packets and long packets
  • Interleaved and normal frames
  • Inoperative as well as operative mode of frame number and line number
  • Unidirectional data transfer
  • ECC generation, Checksum (CRC) generation and checking
  • Error detection and recording

Physical Layer

  • D-PHY Serial and PHY Protocol Interface (PPI)
  • C-PHY Serial and PHY Protocol Interface
  • One to four PHY data lanes and one clock lane, 8 lane CSI-2
  • High Speed and Escape Mode Transmission
  • Global operational timing parameters