VC Verification IP for MIPI CSI-2

Synopsys VC Verification IP for MIPI CSI-2 (Camera Serial Interface) provides a comprehensive set of protocol, methodology, verification and productivity features enabling users to achieve rapid verification of MIPI CSI TX and RX devices. It supports data-type interleaving frames, normal frames and Virtual Channel ID interleaving frames. It simplifies testbench development by enabling engineers to use a single VIP to verify multiple transmission modes across the full CSI-2 protocol.

MIPI CSI-2 VC Verification IP

Protocol Features

  • CSI-2 v2.0, v1.3, v1.2, v1.1
  • C-PHY v1.2, v1.1, v1.0
  • D-PHY v2.1, v2.0, v1.2, v1.1
  • CSI-2 v2.0:
    • 16 virtual channels for D-PHY
    • 32 virtual channels for C-PHY
  • Till CSI-2 v1.3: Four virtual channels
  • Transmitter and Receiver
  • Data scrambling support
  • All types of short and long packets
  • Interleaved and normal frames
  • Unidirectional data transfer
  • Error detection and recording
  • ECC generation, Checksum (CRC) generation and checking
  • Inoperative/operative mode of frame and line number
  • D-PHY/C-PHY: Serial and PHY Protocol Interface (PPI)
  • D-PHY: One to sixteen PHY data lanes and one clock lane
  • C-PHY: One to four PHY lanes
  • High Speed and Escape Mode Transmission
  • Global operational timing parameters