Synopsys VC Verification IP for MIPI HSI is a comprehensive VIP solution enabling pre-silicon functional verification of MIPI HSI (High-speed synchronous Serial Interface) compliant designs.
Works on a recovered clock based on DATA and FLAG signals
Up to 16 logical Tx and Rx full-duplex channels
Transmission Modes - Frame/Stream
Receiver Data Flow Modes -Synchronized/Pipeline/Rx Real Time
Extensive error-insertion and error-detection capabilities including signal error, additional clock, missed clock, invalid frame bit, idle in pipeline data flow, etc.
Supports all control channel commands as per the Data Link protocol layer