Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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Synopsys VIP (VIP) for Non-Volatile Memory Express (NVMe) is designed to help thoroughly verify NVMe designs using both random and directed simulation.
VIP for NVMe is an add-on to the Synopsys VC VIP PCI Express. The VIP is implemented to be verification methodology neutral, and can be integrated with and controlled by any hardware verification language.
Highlights
- Native System Verilog/UVM
- Source code test suite (optional)
- Runs on all major simulators
- Built-in protocol checks
- Transaction log for accelerated debug
- Verification plan and coverage
- Automated error injection
Key Features
- NVMe 2.0/1.4/1.3/1.2/1.1/1.0
- Fully functional host model
- Sequence-based command interface
- Built-in media on controller and shadow media on host
- Manage multiple transport protocols, controller, I/O queues, queue depths, namespaces
- Automated PRP, PRP List, SGL
- CMB/HMB
- Power Management tracking
- MSI, MSI-X and pin-based interrupts
- Protection Information (PI)
- DIF/DIX (in-band/out-of-band) meta-data
- Adjustable host page size support
- Automatic host memory allocation and management
- SVT NVMe VIP over User Transport Support
- Memory Fencing
- Statistics
- Queuing event callbacks
