Use TLM 2.0 integration with Platform ArchitectTM MCO and VirtualizerTM for Hybrid Emulation to validate the architecture of your SoC, early software development and software-driven SoC verification.
Accelerate your Verilog, VHDL or SystemVerilog simulation by an order of magnitude with Simulation Acceleration.
Use fast transaction-based verification to verify the full SoC design
Perform HW/SW Co-Verification and embedded Software Verification
ZeBu's support for embedded processor models is critical for early SOC HW/SW Co-Verification and Pre-Silicon Software Verification.
Fast and efficient Transaction-based Emulation is the enabler for many of the ZeBu emulator's flexible solutions. It is the underlying technology behind Hybrid Emulation, and enables a Scalable Debug methodology.