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SolvNetPlus
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Architecture and Key Features
Specifications: SAS
Key VIP Features
- Spec-linked functional coverage with constrained-random parameters
- Protocol, timing checks, callbacks and error injection
- Acts as Initiator or Target
Debug and Analysis
- PLI/DPI-based central error control and messaging
- Debug Ports to show FSM State, Primitives on Tx/Rx
- Verdi PA support and ASCII signals at each layer for easy debug
Key Protocol Features
- All speeds upto 24G (1.5, 3, 6, 12 and 24G)
- OOB sequence generation/checking, Full expander models, SMP port
- Speed negotiation, training, and multiplexing at any link speed
- SCSI Application-level exerciser for unit and system level testing
- Optional STP support with ATA Application-level exerciser
- Scalable for multiple instantiations to test multi-port hosts or devices
- Serdes, 10b, 20b, 40b & link layer Dword36 / Packet interfaces
- Configurable pattern generation for random, directed or erroneous patterns
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