Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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Speed Software Development, Hardware Verification, and System Validation
The Synopsys HAPS® prototyping solution accelerates software development, hardware verification, and system validation for everything from IP blocks to complete SoCs. Trusted across the electronic supply chain by IP, semiconductor, and system companies, HAPS combines proven hardware platforms and optimized software, delivering top performance and reliability with over 20 years of FPGA synthesis expertise from the Synopsys Synplify® product line.
What's New
Blog
Skymizer Reduces Verification Cycles for AI Accelerator IP Development by 33% with Synopsys HAPS Prototyping
Webinar
Verifying AI Designs - Solving the Challenge of Quadrillions of Verification Cycles
White Paper
Hardware-Assisted Verification: Scaling for Modern Semiconductor Complexity
Tools and Ecosystem
HAPS ProtoCompiler SW
HAPS ProtoCompiler software helps the prototyping team create the fastest performing implementation of their design on the HAPS prototyping hardware. It enables the prototype to find both the optimum partitioning between the FPGAs and the best connectivity using the HapsTrak3 cable. ProtoCompiler uses its proven timing-driven synthesis engine to create a performance optimized prototype. ProtoCompiler is used for runtime and debug, and feeds into the Synopsys Verdi® debug environment. Key features include:
| Performance Optimization | Constraint-driven partitioning and high-speed time-domain multiplexing maximize system clock performance |
| Optimized Partitioning | Optimizes partitioning between FPGAs and connectivity using HapsTrak3 cables |
| Timing-Driven Synthesis | Employs a proven timing-driven synthesis engine to handle complex clocking structures |
| High Capacity | Supports billion ASIC gate capacity for scalable SoC/ASIC projects |
| Flexible Debug Options | High-capacity storage options for single or multi-FPGA debug enhance observability and sample rates |
| Unified Debug Approach | Integrates with the industry-standard Verdi debug solution for efficient error analysis |
| Joint Debugging | Enables joint debugging by RTL verification engineers and prototypers, saving valuable project time |
| Hybrid Prototypes | Arm AMBA compatible transactor level interfaces facilitate hybrid prototype implementation |
HAPS Accessories
HAPS users benefit from a variety of add-on cards and accessories from Synopsys and HAPS Connect partners, including:
| MGB Board | Interfaces standard MGB cards with the HapsTrak connector. |
| GPIO+ Board | Facilitates debugging and basic interactivity through buttons and LEDs. |
| QSFP+ Board | Supports protocols like QSFP+, 40G Ethernet, and SAS. |
| HAPS Logic Analyzer Interface Board | Enables signal probing with standard logic analyzers. |
| LPDDR4 Memory Board | Aids in prototyping designs with LPDDR4 memories. |
| HapsTrak3 (HT3) Interconnect Board | Facilitates point-to-point connections between FPGAs. |
| External Clock Distribution Board | Synchronizes clocks across up to six HAPS systems. |
HAPS Ecosystem
The HAPS Connect program provides a wide range of third-party accessory boards and services that enhance the functionality of HAPS systems. If you're interested in becoming a HAPS Connect member to supply accessory cards to thousands of HAPS users, please contact us at hapsconnect@synopsys.com.
e-Elements
- SOC_IO_HT3: This daughter board includes two micro-USB connectors, 20-pin Arm debug interface, 38-pin MICT, and 28-pin PMOD.
- SOC_SDNF_HT3: Features Micron NAND Flash and SDIO for access to general-purpose nonvolatile devices.
- SOC_NORF_HT3: Contains a TSOP56 NOR Flash device socket.
- FIREFLY_MGB: Supports up to 8 high-speed serial links over 2 FireFly cables.
- FMC_FIREFLY_HT3: Includes an FMC connector to interface with 3 FireFly connectors, supporting up to 10 high-speed links.
- USB3_HT3: Based on a TI TUSB1310 device with ULPI for USB 2.0 and a PIPE interface for USB 3.0 support.
Fidus
- Mantyss 32G: Contains the Xilinx Zynq UltraScale+ ZU19EG, supporting a quad-core Arm processor and up to 32Gbps links.
Gigafirm
- Giga Ninja: FPGA module board with an Intel MAX10 FPGA. I/O pins on a 2.54mm pitch header for various embedded applications.
- HTC-CCB: Used to cross-convert signals from the HT3 connector or cable.
- MGB-Firefly Module: A 12-lane MPO connector for short-reach applications up to 100m on OM3 multiple fiber cables.
Explore the Industry Leading Product Family
HAPS prototyping solution offers an integrated prototyping flow. HAPS-200 is the flagship product and targets the most complex designs with the highest performance requirements. HAPS is supported by an ecosystem of third-party vendors from the Synopsys HAPS Connect program that provides accessory card interfaces for HAPS.
What Our Customers Are Saying
"With the increasing market requirements for handling large AI computational data sets driving the need for enormous GPU and CPU computational power, the development time for NVIDIA’s next generation AI systems have become highly compressed to a yearly release cycle, necessitating best-in-class prototyping solutions. Synopsys HAPS-200 offers the fastest prototyping speed in the industry. The 50 MHz performance we have been able to achieve with HAPS-200 has been key to boosting productivity of our software development teams. We are looking forward to scaling our HAPS-200 deployment to take full advantage for our software development teams.”
Narendra Konda
|Vice President, Hardware Engineering, NVIDIA
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