The Synopsys ZeBu® Server-3 emulation system builds on the proven ZeBu Server architecture, improving performance by up to 4X and boosting capacity by 3X. This performance level enables system-on-chip (SoC) development teams to speed hardware/software bring-up, OS boot and full-chip verification for faster time-to-market.
With its comprehensive debug capabilities, automated software and tight integration with leading verification and system level tool flows, ZeBu Server-3 delivers a highly productive environment for complex SoC verification. It provides multiple verification use modes, including power-aware emulation, simulation acceleration, in-circuit emulation, synthesizable testbench, transaction-based verification and hybrid emulation for deployment flexibility based on project requirements. Because of its small footprint, low weight, modest power/cooling requirements and high reliability, ZeBu Server-3 offers a lower total cost of ownership. ZeBu Server-3 offers the industry’s largest design capacity, supporting chips as big as three billion gates with a highly scalable architecture based on high-density 28-nanometer (nm) FPGA technology.