VC Verification IP for I2C

Synopsys VC Verification IP for I2C includes all protocol speeds. With a comprehensive set of protocols, methodology, verification and ease-of-use features, users are able to achieve rapid coverage convergence for their I2C designs.

I2C VC Verification IP

Protocol Features

  • All features of I2C version 2.1
  • Fast-mode plus speed feature and Bus clear feature of version 3.0
  • Standard-mode, fast-mode, fast-mode plus, and high-speed mode
  • Supports both 7-bit and 10-bit addressing
  • Includes master agent, slave agent, monitor and checker
  • Slave agent can be configured as a generic slave or as an EEPROM slave
  • Analysis ports connect master or slave agents to scoreboard
  • Glitch insertion and rejection
  • Configurable clock stretching