VC Verification IP for I2S
Synopsys VC Verification IP (VIP) for I2S provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve rapid verification of designs that include interfaces implementing the I2S specification.
- Fully compliant with the I2S bus specification, rev. June 5, 1996
- Full and half duplex
- Configurable frame lengths for different (audio) transfer rates
- Left justified, right justified and PCM mode for audio transfer
- Support for dynamic reconfiguration.
- Mechanism to enable/disable data transmission, ws generation and clock generation
- Configurable as master or slave
- Dataword length upto 64 bits
- Multi agent system environment
- Transmitter and receiver agents can be used in standalone mode