EDA
System
IP
SolvNetPlus
Training & Education
Architecture & Key Features
Specifications: LLR 1.0/0.81, CBFC 1.0/0.8rc1
Interfaces: 100G and above speeds
DUT Types/Topology:
- X’MII, PCS+PHY, MAC+PCS+PHY (Full Stack)
Key VIP Features
- Class based transaction flow for ease of use
- Specification linked Protocol checks and functional coverage
- Callback, error injections and analysis ports for Scoreboard
- Configurable timers for threshold testing
- Reference example illustrating sanity usage and representative protocol scenarios
- Separate Analysis ports for LLR frames and Ctlos
- Can be used in Active as well as in Passive mode
Debug and Analysis
- Verdi based protocol and performance analysis
- Protocol checks at each layer
- Debug ports and trace files
Key Protocol Features
- Transaction attributes for modelling various traffic profiles related to CBFC and LLR
- Configuration attributes for finer control over interface characteristic such as rate and mode of operation
- Supported Use-cases:
- Transmission of LLR eligible/ineligible frames
- Configurable replay timers
- Transmission of all 4 Ctlos
- CBFC flow control
- Support upto 32 virtual channels
- Support for REPLAY of LLR Eligible frames
- Replay buffer support with configurable size
- Replay of LLR Eligible frames NACK received or replay_timer expired
Related IP Solutions
- Complete PCI Express 7.0 IP Solutions
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