Verification IP for DisplayPort up to v2.1

Specifications

• DP2.1a/2.0/1.4a, HDCP 2.2/1.3, DSC 1.2a
• DP2.1 over USB4v2.0 & DP1.4 over USB4v1.0
• Video timing CEA-861-F, DMT v1r13, CVT v1.2

DUT Types/Topology: Source/Sink/LTTPR/Branch

Key VIP Features

• Specification linked Functional coverage for DP and DP over USB4
• Specification linked protocol checks & Verification plans
• Custom Bypass link training & link layer parallel interface support for faster verification
• Scoreboard, Monitor callbacks and error injection
• Transaction level higher Abstraction APIs for Audio/Video/Control

Debug and Analysis

• Verdi based protocol and performance analysis
• Protocol checks at each layer
• Debug ports for all FSM and monitored data, Stream layer, main link layer & aux layer
• Trace files for Video/Audio/SDP/Symbol & Verbose logfiles

Key Protocol Features

• Support for majority of DP 2.0 SCR's over DP 2.0
  DPAE support for DP/eDP SST, MST (8b/10b) & DP128b/132b MST modes
• SST, MST up to 8 streams; 128b/132b and 8b/10b support
  RBR, HBR, HBR2, HBR3, UHBR10, UHBR13.5, UHBR20 link rates; 1,2 & 4 lanes
• 3D, 8K/10K frames and custom frame support
• Support for SST and MST Tunneling, Aux and Main link Tunneling packets
• Support for DP Adapter with and without USB4 Router

Test Suites / Groups Features

• Source-code pre-defined testcases with UVM Testbench
• Easily integrated with DP Source/Sink/LTTPR DUT and USB4 Tunneling topologies into ready to use environment components
• USB4 tunneling support with and without Router for both DP2.1(EA) & DP1.4
• Audio/Video/Control transaction
• In built sequences along with testcases