VC Verification IP for MIPI DPI-2

VC Verification IP for MIPI DPI-2

Synopsys VC Verification IP for MIPI Display Pixel Interface (DPI-2) provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve rapid verification of DPI-2 Host and DPI-2 Devices. MIPI DPI2 VIP supports all color modes as per the MIPI DPI specification 2.0. Synopsys VC VIP, based on its next-generation architecture and implemented in native SystemVerilog and UVM, runs natively on all major simulators. VC VIP can be integrated, configured and customized with minimal effort. Testbench development is accelerated with the assistance of built-in verification plans, functional coverage, example tests and comprehensive collection of sequences.

Verification IP for MIPI DPI2

Highlights

  • SystemVerilog/UVM testbench
  • Runs natively on all major simulators
  • Built-in coverage and verification plan
  • Built-in Protocol checks
  • Verdi® integrated protocol aware debug
  • Example testcases and sequences

Key Features

  • Supports DPI specification version 2.0
  • DPI-2 Host and DPI-2 Device
  • Supports all color modes as per DPI-2 Specification
  • Supports 16-bit, 18bit, 24bit pixels data bus widths
  • Supports Full/Reduced color mode for Type4 Architecture
  • Supports all Vertical Timing Parameters for DPI-2 Operation as per ranges specified by DPI-2 Specification
  • Supports all Horizontal Timing Parameters for DPI-2 Operation as per ranges specified by DPI-2 Specification
  • Shutdown for Type4 Architecture
  • All control signals are supported