Duet Packages of Embedded Memories & Logic Libraries

The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, deliver an integrated portfolio of logic libraries, memory compilers and memory test and repair capabilities. These packages combine high-performance and high-density SRAMs, register files, ROMs, standard cells, and Power Optimization Kits (POKs), providing all the essential elements for implementing a complete system-on-chip (SoC). A range of options—including overdrive/low voltage operation, process, voltage, and temperature corners (PVTs), high-density SRAMs, and multi-channel logic standard cells—enables designers to achieve optimal results tailored to their specific SoC applications.

Additionally, the High Performance Core (HPC) Design Kit offers a collection of high-speed and high-density memory instances and logic cells. This kit is specifically engineered to help SoC designers optimize CPU, GPU, and DSP cores for maximum speed, minimal area, lowest power consumption, or the ideal balance of all three.

Synopsys Embedded Memories and Logic Libraries are available for multiple foundries and process technologies. Find the best solutions for your SoC design needs: Foundation IP Selector.