The growing compute demands of modern vehicles are forcing chipmakers to venture into new territory.
To deliver increased processor performance for engine and body control systems, one leading semiconductor supplier knew it had to move to an automotive-qualified FinFET technology process — a leap that would introduce significant new design complexity.
The company turned to Synopsys for our Foundation IP portfolio and deep expertise in automotive applications. Through close collaboration, we developed a highly customized FinFET IP solution and hit demanding performance, power, and reliability goals that standard IP could not.
The project offers a blueprint for how other semiconductor companies can confidently advance their automotive compute roadmaps, even when standard offerings don’t quite fit.
Modern vehicles depend on highly capable microcontroller units (MCUs) and systems-on-chip (SoCs). Over time, the compute requirements for these MCUs and SoCs have steadily increased. More advanced control algorithms, tighter emissions and efficiency targets, and richer in-vehicle features all contribute to higher performance and power-efficiency demands.
As a global leader in the automotive market, our customer has built a reputation on delivering high-quality, highly reliable devices across long product lifetimes. For its next generation of automotive-grade SoCs, the company sought higher performance, lower power, and denser integration with reduced system cost and faster time to market — all without sacrificing internal quality benchmarks.
Planar process nodes were not going to be enough to meet these challenges. The company’s engineers recognized that these mature technologies could not continue to scale performance without imposing unacceptable penalties in power consumption and die area, particularly under the high-temperature, long-lifetime requirements of automotive applications.
FinFET technology offers a way to overcome these challenges. FinFET — short for “fin field-effect transistor”— can deliver better power-performance efficiency at higher compute demand, while still meeting quality and reliability targets in harsh environments with aggressive density gains.
For engineers who had built much of their success on in-house foundation IP and proven planar processes, however, FinFET represented a major shift with a host of new technical challenges.
One of FinFET’s key advantages is improved control of leakage, the unwanted current that flows through a transistor even when it is off. Leakage saps power, especially in always-on or standby modes, and is a particular concern for vehicles that may sit for extended periods of time. It also significantly worsens at high temperatures and smaller geometries, so in automotive MCUs built on bulk planar technologies, leakage can account for a large share of power at advanced nodes. It can also restrict designers’ ability to use the fastest transistors with lower threshold voltages.
FinFET transistors address this by wrapping the gate around a thin vertical fin, delivering better electrostatic control of the channel and reducing leakage compared to an equivalent planar node. In documented migrations to FinFET processes, designers have reported substantial reductions in leakage power, along with improvements in dynamic power and performance.
At the same time, moving to FinFET introduces new design and qualification complexity. Automotive-grade products must pass extensive reliability tests with very low defect rates, support long lifetimes, and operate under demanding mission profiles — all of which magnify the impact of process variation and voltage margins.
To meet strict internal quality standards, the company’s engineers needed to understand and characterize FinFET behavior before deployment into safety- and cost-sensitive vehicle platforms. The team also had to ensure the full foundation IP stack — logic libraries, embedded memories, and related views — would support their design and verification flows across an extended toolchain.
The challenge was not merely adopting a new transistor architecture, but doing so with the rigor required for automotive-grade reliability and longevity.
Although our customer had a long history of developing in-house foundation IP, mounting a similar effort for a new FinFET node would have required substantial investment as well as time to establish modeling, characterization, and methodology. On the other hand, off-the-shelf IP could never support their stretched requirements for ultra-low leakage, extended characterization, custom features, and superior reliability.
They needed a strategic partner.
The customer selected our Foundation IP for several reasons. First, they had previously experienced success with our libraries on an earlier node, with notable advantages across power, performance, and area (PPA). For automotive-grade FinFET technology, our standard logic libraries similarly demonstrate strong PPA characteristics, and our embedded memory portfolio includes dense SRAMs, low-power modes, robust test features, and performance scaling.
The icing on the cake: a track record in automotive applications and willingness to customize IP for demanding use cases.
But this engagement needed to be about more than just IP. Our customer sought a flexible, collaborative partnership model. One that would give them confidence in quality, reliability, and delivery timeline while preserving internal knowledge and long-term supply assurance, all of which are essential in the automotive market.
From the outset, our customer provided clear PPA targets along with a list of specialized feature requests and characterization needs. Standard libraries and memories provided a starting point, but the program quickly expanded into extensive customization.
On the logic side, the customer required several nonstandard library views and detailed characterization beyond the usual offering. We delivered a rich set of process, voltage, and temperature (PVT) corners tailored to automotive-grade mission profiles, enabling analysis of timing and power across a broader operating space. The breadth of our library portfolio helped the customer balance performance against tight leakage constraints while staying within their defined operating window.
For embedded memories, ultra-low leakage was the focus. Many of our customers’ products need to remain powered or in low-power states for extended periods, so static leakage directly impacts system power and battery-related metrics. We provided low-leakage memory compilers and configurations optimized for these conditions, drawing on experience from more advanced nodes to introduce additional features into the FinFET IP.
The collaboration went beyond libraries and memories. During the engagement, additional reliability requirements emerged that were not fully addressed by existing flows, and we joined forces with the customer to develop extended analysis and measurement methods.
It was a powerful team-up: our customer’s deep understanding of application-level reliability combined with our expertise in IP design, modeling, and characterization. Together, we produced a more complete methodology to support their stringent internal reliability and quality targets.
Strong program management and diligent support underpinned all of this work. Requirements, schedules, and deliverables were coordinated with a high level of transparency between teams, even as new requests were added and the characterization scope grew.
The engagement delivered customized, automotive-grade foundation IP on a FinFET process, meeting the customer’s PPA and technical objectives, all while upholding their quality expectations. The solution combined:
As a result, the customer has enabled its product roadmap on FinFET with high confidence, supporting next-generation automotive compute while maintaining differentiation in quality and reliability.
Now the collaboration is expanding into additional product lines and process technologies, reflecting a deeper, long-term partnership between the two companies.
For automotive semiconductor suppliers assessing similarly complex technology node transitions, the engagement demonstrates how proven foundation IP, targeted customization, and close engineering collaboration can help reduce risk and improve outcomes, even when standard solutions fall short of project requirements.