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Our Energy-Efficient SoCs experts share insights on low-power design and verification techniques to address power-related challenges for battery-powered to wired designs.

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Customizing Foundation IP to Meet Low-Voltage Requirements

BLOG Sep 16, 2025/3 min read

BLOG

Customizing Foundation IP to Meet Low-Voltage Requirements

By Andrew Appleby, Mohammad Tanveer, Daryl Seitzer

Tags: Customer Spotlight, Low Power, Memory, Signal & Power Integrity, Design, About Synopsys, Energy-Efficient SoCs, Foundation IP, Silicon IP, Verification

What Is Local Layout Effect (LLE) and How Does It Impact Chip Design?

BLOG Sep 11, 2025/3 min read

BLOG

What Is Local Layout Effect (LLE) and How Does It Impact Chip Design?

By Chun-Soo Kim, Hoseong Kim

Tags: Design, About Synopsys, Physical Implementation, 5nm and Below, Energy-Efficient SoCs, Signoff, Verification

How to Improve the Power Efficiency of AI Chips

BLOG Sep 09, 2025/4 min read

BLOG

How to Improve the Power Efficiency of AI Chips

By Godwin Maben

Tags: Low Power, AI & Machine Learning, Silicon Lifecycle Management, Signal & Power Integrity, Design, About Synopsys, Energy-Efficient SoCs, Verification

AI at the Edge: Synopsys Collaborates with Thai Embedded Systems Association to Advance AIoT Innovation

BLOG Aug 12, 2025/3 min read

BLOG

AI at the Edge: Synopsys Collaborates with Thai Embedded Systems Association to Advance AIoT Innovation

By Adrian Ng

Tags: AI & Machine Learning, RISC-V, Prototyping, Design, About Synopsys, Internet of Things, Energy-Efficient SoCs, Processor Solutions, Silicon IP

Solving Analog Design Challenges to Power Our Digital World

BLOG Jul 08, 2025/4 min read

BLOG

Solving Analog Design Challenges to Power Our Digital World

By Sumit Vishwakarma

Tags: Cloud, AMS Verification, AI & Machine Learning, Memory, RF Design, Signal & Power Integrity, Design, About Synopsys, AMS Simulation, Energy-Efficient SoCs, Verification, Analog Design

RTL Signoff vs. Functional Signoff: What’s the Difference?

BLOG Jul 01, 2025/5 min read

BLOG

RTL Signoff vs. Functional Signoff: What’s the Difference?

By Bradley Geden, Manoz Palaparthi

Tags: Multi-Die, RTL Synthesis, Static & Formal Verification, AI & Machine Learning, Debug, Physical Verification, Test, Simulation, About Synopsys, Energy-Efficient SoCs, Signoff, Design, Verification, Formal Verification

How Early Power Analysis Drives Energy-Efficient RISC-V Designs

BLOG Jul 17, 2024/4 min read

BLOG

How Early Power Analysis Drives Energy-Efficient RISC-V Designs

By William Ruby

Tags: RISC-V, About Synopsys, Energy-Efficient SoCs, Processor Solutions, Silicon IP

Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

BLOG Apr 01, 2024/4 min read

BLOG

Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

By William Ruby

Tags: Design, About Synopsys, Energy-Efficient SoCs, HPC, Data Center

Why Is the Power Device Market So Hot Right Now?

BLOG Jan 24, 2024/4 min read

BLOG

Why Is the Power Device Market So Hot Right Now?

By Dermott Lynch

Tags: Design, About Synopsys, Energy-Efficient SoCs

Driving Higher Energy Efficiency in Automotive Electronics Designs

BLOG Jan 17, 2024/4 min read

BLOG

Driving Higher Energy Efficiency in Automotive Electronics Designs

By William Ruby

Tags: Design, About Synopsys, Energy-Efficient SoCs, Automotive

Exploring Advanced Power Optimization for a More Sustainable Future

BLOG Oct 06, 2023/3 min read

BLOG

Exploring Advanced Power Optimization for a More Sustainable Future

By William Ruby

Tags: Design, About Synopsys, Energy-Efficient SoCs, Verification

How to Save Power and Keep HPC and Data Center Applications Cool

BLOG Aug 15, 2023/6 min read

BLOG

How to Save Power and Keep HPC and Data Center Applications Cool

By Shekhar Kapoor, Rita Horner, William Ruby

Tags: Design, About Synopsys, Energy-Efficient SoCs, HPC, Data Center

Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

BLOG Jul 26, 2023/4 min read

BLOG

Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

By William Ruby

Tags: AI & Machine Learning, Design, About Synopsys, Energy-Efficient SoCs, HPC, Data Center

Synopsys 2022 ESG Report: Building a Smart Future Together

BLOG May 30, 2023/2 min read

BLOG

Synopsys 2022 ESG Report: Building a Smart Future Together

By Erika Varga McEnroe

Tags: Design, About Synopsys, Energy-Efficient SoCs

BLOG May 08, 2023/6 min read

BLOG

How to Shift Verification Left in Low-Power Chip Design

By Avinash Palepu

Tags: Static Verification, About Synopsys, Energy-Efficient SoCs, Verification, Formal Verification

Synopsys Acquires Silicon Frontline Technology

BLOG May 04, 2023/3 min read

BLOG

Synopsys Acquires Silicon Frontline Technology

By Synopsys Editorial Staff

Tags: Design, About Synopsys, Energy-Efficient SoCs, Signoff

BLOG Apr 21, 2023/3 min read

BLOG

Reducing Energy Consumption: Sustainable Chip Design

By Synopsys Editorial Staff

Tags: About Synopsys, Energy-Efficient SoCs

Optimizing Low-Power SoC Design Verification & Analysis

BLOG Apr 05, 2023/4 min read

BLOG

Optimizing Low-Power SoC Design Verification & Analysis

By Avinash Palepu

Tags: AI & Machine Learning, About Synopsys, Energy-Efficient SoCs, Verification

How the Electronics Industry Can Shape a Sustainable World

BLOG Dec 06, 2022/6 min read

BLOG

How the Electronics Industry Can Shape a Sustainable World

By Godwin Maben, Piyush Sancheti

Tags: Silicon Lifecycle Management, Design, About Synopsys, Energy-Efficient SoCs, Silicon IP, Verification

The Next Era of Chip Design Starts with Machine Learning

BLOG Oct 10, 2022/5 min read

BLOG

The Next Era of Chip Design Starts with Machine Learning

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Silicon Lifecycle Management, Design, About Synopsys, Energy-Efficient SoCs

Practical Power Management: How the UPF 3.0 Standard is Transforming SoC Design

BLOG Feb 24, 2022/5 min read

BLOG

Practical Power Management: How the UPF 3.0 Standard is Transforming SoC Design

By Patrick Sheridan, Tim Kogel

Tags: Energy-Efficient SoCs, Verification

Custom Processors and SoC Designs Build Chip Differentiation

BLOG Feb 14, 2022/6 min read

BLOG

Custom Processors and SoC Designs Build Chip Differentiation

By Rich Collins, Matt Guitierrez

Tags: About Synopsys, Energy-Efficient SoCs, Processor Solutions, Silicon IP

Enabling IoT Applications with Low-Power Design Techniques

BLOG Jan 03, 2022/8 min read

BLOG

Enabling IoT Applications with Low-Power Design Techniques

By Ron Lowman

Tags: Security IP, About Synopsys, Internet of Things, Interface IP, Energy-Efficient SoCs, Silicon IP

Software-Enabled Full Chip Power Signoff & SoC Verification

BLOG Nov 03, 2021/5 min read

BLOG

Software-Enabled Full Chip Power Signoff & SoC Verification

By Godwin Maben

Tags: Simulation, Emulation, About Synopsys, Energy-Efficient SoCs, Verification

Unified Power Format Expands Low-Power IC Design

BLOG Oct 04, 2021/8 min read

BLOG

Unified Power Format Expands Low-Power IC Design

By Nikhil Amin, Harsha Vardhan

Tags: Design, About Synopsys, Energy-Efficient SoCs, Verification

Improved Power System Optimization for SoC Designs

BLOG Jul 28, 2021/6 min read

BLOG

Improved Power System Optimization for SoC Designs

By Jay Roy

Tags: Design, About Synopsys, Energy-Efficient SoCs, Verification

How Emulation Helps Find Power Bugs During SoC Verification

BLOG Jul 06, 2021/5 min read

BLOG

How Emulation Helps Find Power Bugs During SoC Verification

By Alex Wakefield

Tags: Static Verification, Simulation, Design, Emulation, About Synopsys, Energy-Efficient SoCs, Signoff, Verification, Virtual Prototyping, Formal Verification

Low Power Q&A with Dr. Renu Mehra, R&D Group Director

BLOG May 12, 2021/9 min read

BLOG

Low Power Q&A with Dr. Renu Mehra, R&D Group Director

By Synopsys Editorial Team

Tags: Design, About Synopsys, Energy-Efficient SoCs

Emulation Technology for Faster SoC Power Verification

BLOG Mar 16, 2021/4 min read

BLOG

Emulation Technology for Faster SoC Power Verification

By Johannes Stahl

Tags: AI & Machine Learning, Design, Emulation, About Synopsys, 5G Wireless, Energy-Efficient SoCs, Signoff, Verification

How AI Hardware Design Addresses Power Challenges

BLOG Feb 02, 2021/4 min read

BLOG

How AI Hardware Design Addresses Power Challenges

By Solaiman Rahim

Tags: AI & Machine Learning, About Synopsys, Energy-Efficient SoCs

Chip Design: AI & IoT's Impact on Power Consumption

BLOG Jan 12, 2021/4 min read

BLOG

Chip Design: AI & IoT's Impact on Power Consumption

By Godwin Maben

Tags: AI & Machine Learning, Design, About Synopsys, Energy-Efficient SoCs

Impact of Low Power Design on Smart Edge IoT & Machine Learning

BLOG Sep 23, 2020/4 min read

BLOG

Impact of Low Power Design on Smart Edge IoT & Machine Learning

By Pieter van der Wolf

Tags: AI & Machine Learning, Design, About Synopsys, Internet of Things, Energy-Efficient SoCs

The Impact of AI on Low Power Chip Design

BLOG Sep 09, 2020/5 min read

BLOG

The Impact of AI on Low Power Chip Design

By Godwin Maben

Tags: AI & Machine Learning, About Synopsys, Energy-Efficient SoCs

BLOG Jan 09, 2014/2 min read

BLOG

LPDDR3 vs. DDR3L: Understanding the Differences

By Graham Allan

Tags: Interface IP, Energy-Efficient SoCs, Silicon IP

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Customizing Foundation IP to Meet Low-Voltage Requirements

What Is Local Layout Effect (LLE) and How Does It Impact Chip Design?

How to Improve the Power Efficiency of AI Chips

AI at the Edge: Synopsys Collaborates with Thai Embedded Systems Association to Advance AIoT Innovation

Solving Analog Design Challenges to Power Our Digital World

RTL Signoff vs. Functional Signoff: What’s the Difference?

How Early Power Analysis Drives Energy-Efficient RISC-V Designs

Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

Why Is the Power Device Market So Hot Right Now?

Driving Higher Energy Efficiency in Automotive Electronics Designs

Exploring Advanced Power Optimization for a More Sustainable Future

How to Save Power and Keep HPC and Data Center Applications Cool

Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

Synopsys 2022 ESG Report: Building a Smart Future Together

How to Shift Verification Left in Low-Power Chip Design

Synopsys Acquires Silicon Frontline Technology

Reducing Energy Consumption: Sustainable Chip Design

Optimizing Low-Power SoC Design Verification & Analysis

How the Electronics Industry Can Shape a Sustainable World

The Next Era of Chip Design Starts with Machine Learning

Practical Power Management: How the UPF 3.0 Standard is Transforming SoC Design

Custom Processors and SoC Designs Build Chip Differentiation

Enabling IoT Applications with Low-Power Design Techniques

Software-Enabled Full Chip Power Signoff & SoC Verification

Unified Power Format Expands Low-Power IC Design

Improved Power System Optimization for SoC Designs

How Emulation Helps Find Power Bugs During SoC Verification

Low Power Q&A with Dr. Renu Mehra, R&D Group Director

Emulation Technology for Faster SoC Power Verification

How AI Hardware Design Addresses Power Challenges

Chip Design: AI & IoT's Impact on Power Consumption

Impact of Low Power Design on Smart Edge IoT & Machine Learning

The Impact of AI on Low Power Chip Design

LPDDR3 vs. DDR3L: Understanding the Differences

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