Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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With each passing day, the world becomes a little more digital. But even as society embraces AI, 5G, IoT, and self-driving vehicles, the chip architectures powering these digital applications require, ironically, design innovations for analog functions.
From power management and audio components to RF transceivers for cellular, Wi-Fi, Bluetooth, and GPS, today’s system-on-chip (SoC) architectures demand highly advanced analog mixed-signal (AMS) designs.
What’s more, emerging technologies like analog in-memory compute (AIMC) are pushing the boundaries of what analog designs can achieve. AIMC integrates memory and computation to address the growing demands of AI, enabling energy-efficient, high-throughput processing for tasks like AI inferencing.
But analog design processes are inherently different than digital. And because they are largely manual, they continue to lag significantly behind digital design flows that have become increasingly automated. Shrinking that gap is a core challenge when developing semiconductors for next-generation systems and AI infrastructure.
How can analog teams iterate designs faster and adhere to compressed timelines?
There are no easy fixes. The high sensitivity of analog signals creates design complexity and variability that require extended, compute-intensive simulations, while flawed verification too often leads to chip re-spins. As analog content increases, semiconductor companies of all sizes grapple with errors and delays.
Digitizing analog design
Fortunately, new system-level, digital-centric approaches are providing relief.
- Many analog functions now incorporate digital or programmable elements.
- Analog components can be verified within a digital framework, and designers can create mixed-signal testbenches that leverage co-simulation — blurring the lines between digital and analog flows.
- Advanced electronic design automation (EDA) solutions play a key role as well, with companies shifting from in-house scripts to commercial analog tools.
Despite these advances, a gap remains: Analog cycles are still ~2-3x slower than digital on average. The industry needs digital-aware, AI-powered analog tools to close that gap — especially for AIMC design and simulation.
Enabling AIMC innovation
Synopsys has emerged as a key enabler in this domain. Our advanced tools help analog teams:
- Simplify the design of AIMC-based SoC architectures.
- Address the systemic complexity of analog circuit simulations.
- Enhance productivity and accelerate development timelines.
For these reasons and more, we recently received the 2025 Global Technology Innovation Leadership Award for Advanced Analog In-Memory Computing from Frost & Sullivan.
“Synopsys has built a comprehensive and integrated suite of technologies that significantly lowers the barrier for developing analog in-memory compute systems, particularly for startups and innovators in AI hardware,” said Jabez Mendelson, research manager at Frost & Sullivan. “Their unique combination of AI-enhanced tools, simulation performance, and cloud-native delivery exemplifies technology leadership and customer-focused innovation.”
Our unique approach is built on four pillars:
- AI-powered optimization. Our ASO.ai solution leverages machine learning (ML) to automate analog design tasks — from sizing and layout optimization to corner analyses — and accelerate workflows that traditionally require expert tuning. When migrating an analog IP, for example, ASO.ai can automatically explore thousands of sizing options and suggest optimal parameters, which dramatically cuts down tuning time.
- GPU-accelerated simulation. To shrink SPICE (Simulation Program with Integrated Circuit Emphasis, a widely used tool for simulating and analyzing the behavior of AMS circuits) runtimes, our PrimeSim solution harnesses GPUs and multi-core CPUs. As the industry's fastest GPU-accelerated SPICE simulator, it empowers circuit designers to efficiently tackle large, previously unsolvable post-layout circuits with SPICE-level accuracy, providing accelerated runtimes and signoff precision.
A GPU-accelerated Synopsys PrimeSim is projected to achieve 30x speed-up with the NVIDIA Grace Blackwell platform. SPICE utilizing NVIDIA GH200 Grace Hopper Superchips can achieve a 15x speed-up, reducing a multi-day analog sim to just a few hours.
“Circuit simulation is an essential workload in semiconductor design and is extremely compute-intensive,” said Tim Costa, senior director of CUDA-X and CAE at NVIDIA. “Accelerating Synopsys PrimeSim with NVIDIA CUDA-X unlocks the design of the next generation of processors that will fuel the AI industrial revolution.”
- A unified and open platform. By providing a unified and open chip design platform, we enable our customers to integrate our analog tools alongside their digital flows for a seamless SoC design experience. Process design kits (PDKs) from all leading foundries — including TSMC, GlobalFoundries, Samsung, and Intel Foundry — are fully supported down to 28 nanometers (nm) and below.
- Cloud enablement. In its award citation, Frost & Sullivan highlighted the benefits of Synopsys Cloud, especially for startups and lean engineering teams. Browser-based access to our full EDA suite, compute and storage infrastructure, and preconfigured flows — all under a flexible pay-per-use licensing model — enables design cycles to begin in hours instead of weeks.
Breakthrough productivity gains
Our differentiated solutions help tackle specific analog design challenges and can deliver dramatic improvements in productivity. Our customers have achieved:
- 25-100x productivity gain on analog-intensive projects with Synopsys ASO.ai
- 5x faster post layout memory timing analysis with Synopsys PrimeSim GPU
- 12x overall runtime gain after migrating to Synopsys PrimeSim XA
- 15x faster characterization with 77% better passing rates using ML in Synopsys PrimeLib
“As design complexity escalates at advanced process nodes, our collaboration with Synopsys plays a pivotal role in helping customers overcome these challenges,” said Hyung-Ock Kim, vice president and head of the Foundry Design Technology Team at Samsung Electronics. “By combining Samsung Foundry’s most advanced technologies with Synopsys’ AI-powered circuit optimization and GPU-accelerated tools like Synopsys ASO.ai and PrimeSim, we are delivering breakthrough performance and efficiency that accelerate time-to-market for next-generation semiconductor designs.”
Analog will continue to play a critical role in next-generation computing systems, and the pressure to deliver accurate, efficient, and scalable AMS designs has never been higher. By embedding AI and high-performance compute engines into our circuit simulation solutions and making them available in the cloud, we will continue to deliver the tools analog teams need to accelerate their design and verification flows.
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