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Synopsys Interconnect IPs Enabling Scalable Compute Clusters

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3 min read/May 18, 2025

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Synopsys Interconnect IPs Enabling Scalable Compute Clusters

By Neeraj Paliwal

Tags: Data Center, AI & Machine Learning, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

A Novel Approach to Speeding Up PCIe 6.0+ Designs - Compliance Load Board Verification

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6 min read/Mar 31, 2025

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A Novel Approach to Speeding Up PCIe 6.0+ Designs - Compliance Load Board Verification

By Deepak Kumar Lnu

Tags: Verification Central, AI & Machine Learning, Verification IP, HPC, Data Center, Verification

Re-engineering Engineering™ from Silicon to Systems

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3 min read/Mar 19, 2025

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Re-engineering Engineering™ from Silicon to Systems

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center

Enabling Massive AI Clusters with the Industry’s First Ultra Ethernet and UALink IP Solutions

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3 min read/Dec 11, 2024

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Enabling Massive AI Clusters with the Industry’s First Ultra Ethernet and UALink IP Solutions

By Ron Lowman, Jon Ames

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Collaboration for Innovation: How Synopsys and TSMC are Advancing Chip Design

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2 min read/Dec 05, 2024

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Collaboration for Innovation: How Synopsys and TSMC are Advancing Chip Design

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design, Manufacturing, Foundation IP, HPC, Data Center, Silicon IP, 3DIC Design

Advancing Software-Defined, Silicon-Optimized Data Centers

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3 min read/Nov 21, 2024

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Advancing Software-Defined, Silicon-Optimized Data Centers

By Greg Sorber

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

World's First CXL 3.1 Multi-Vendor Interoperability Demo Showcases New Memory Possibilities for Hyperscale Data Centers

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2 min read/Nov 20, 2024

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World's First CXL 3.1 Multi-Vendor Interoperability Demo Showcases New Memory Possibilities for Hyperscale Data Centers

By Gary Ruggles, Gordon Getty

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Can Sub-Arctic Temperature Circuits Solve the AI Energy Challenge?

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3 min read/Aug 28, 2024

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Can Sub-Arctic Temperature Circuits Solve the AI Energy Challenge?

By Synopsys Editorial Staff

Tags: TCAD, Chip Design Insights, Manufacturing, HPC, Data Center

Ultra Ethernet Consortium Set to Enable Scaling of Networking Interconnects for AI and HPC

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3 min read/Jul 31, 2024

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Ultra Ethernet Consortium Set to Enable Scaling of Networking Interconnects for AI and HPC

By Jon Ames

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Synopsys SoC Verification Kit – Delivering Out-of-the-box SoC Verification Solution

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3 min read/Jun 18, 2024

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Synopsys SoC Verification Kit – Delivering Out-of-the-box SoC Verification Solution

By Varun Agrawal

Tags: AI & Machine Learning, Memory, Verification IP, Automotive, HPC, Data Center, Verification

Synopsys Ethernet 1.6T Verification IP and Protocol Solutions for Next-Generation Networking and Communication Systems

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4 min read/Jun 14, 2024

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Synopsys Ethernet 1.6T Verification IP and Protocol Solutions for Next-Generation Networking and Communication Systems

By Laxmi Narayan

Tags: Verification Central, Cloud, AI & Machine Learning, Emulation, Verification IP, HPC, Data Center, Verification

Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

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4 min read/Apr 01, 2024

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Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

By William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow

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3 min read/Mar 05, 2024

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CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow

By Karan Shah, Irfan Shaikh

Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Physical Verification, Test, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center

Meeting the World’s Growing Bandwidth Demands with a Complete 1.6T Ethernet IP Solution

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6 min read/Feb 29, 2024

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Meeting the World’s Growing Bandwidth Demands with a Complete 1.6T Ethernet IP Solution

By Priyank Shukla, John Swanson, Varun Agrawal, Jon Ames

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

XConn Revitalizes Next-Gen Data Centers with CXL 2.0 Switch Designed with Synopsys IP

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4 min read/Jan 30, 2024

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XConn Revitalizes Next-Gen Data Centers with CXL 2.0 Switch Designed with Synopsys IP

By Gary Ruggles

Tags: Data Center, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

How Will Angstrom-Scale Chips Advance the Electronics Industry?

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7 min read/Nov 15, 2023

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How Will Angstrom-Scale Chips Advance the Electronics Industry?

By Deepak Sherlekar, Rob Aitken

Tags: AI & Machine Learning, Chip Design Insights, Design, 5nm and Below, Automotive, HPC, Data Center

Don’t Risk Failure—The Verification Process Begins During Chip Architecture

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5 min read/Oct 18, 2023

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Don’t Risk Failure—The Verification Process Begins During Chip Architecture

By Kamal Desai, Dr. Johannes Stahl, Vivek Prasad

Tags: Data Center, Chip Design Insights, HPC, Data Center, Verification

Ensuring the Health and Reliability of Multi-Die Systems

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7 min read/Oct 11, 2023

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Ensuring the Health and Reliability of Multi-Die Systems

By Randy Fish, Yervant Zorian, Manuel Mota, Guy Cortez

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center

How to Augment SoC Development to Conquer Your Design Hurdles

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5 min read/Aug 16, 2023

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How to Augment SoC Development to Conquer Your Design Hurdles

By Rita Horner, Praveen Durga

Tags: Chip Design Insights, Design, HPC, Data Center

How to Save Power and Keep HPC and Data Center Applications Cool

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6 min read/Aug 15, 2023

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How to Save Power and Keep HPC and Data Center Applications Cool

By Shekhar Kapoor, Rita Horner, William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

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7 min read/Aug 08, 2023

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How CXL Is Improving Latency in High-Performance Computing

By Richard Solomon, Gary Ruggles, Varun Agrawal

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

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4 min read/Jul 26, 2023

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Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

By William Ruby

Tags: AI & Machine Learning, Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

Enabling the Global 800G Ecosystem with 112G Ethernet PHY IP

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5 min read/Jul 25, 2023

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Enabling the Global 800G Ecosystem with 112G Ethernet PHY IP

By Priyank Shukla, Manmeet Walia

Tags: Data Center, Product Spotlight, Chip Design Insights, HPC, Data Center, Silicon IP

Can Photonics Power Next-Gen AI Chatbots?

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5 min read/Jul 19, 2023

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Can Photonics Power Next-Gen AI Chatbots?

By Twan Korthorst

Tags: AI & Machine Learning, Chip Design Insights, Design, Photonic, HPC, Data Center

The Path to Faster Hyperscale Data Centers Starts with 224G Ethernet PHY IP

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5 min read/Jun 27, 2023

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The Path to Faster Hyperscale Data Centers Starts with 224G Ethernet PHY IP

By John Swanson, Manmeet Walia

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

How Silicon Lifecycle Management Strengthens HPC and Data Center Reliability

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5 min read/Jun 20, 2023

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How Silicon Lifecycle Management Strengthens HPC and Data Center Reliability

By Randy Fish, Guy Cortez

Tags: AI & Machine Learning, Silicon Lifecycle Management, Chip Design Insights, HPC, Data Center

How to Maximize PCIe 6.0’s Advantages with End-to-End PCIe Design Solutions

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9 min read/Jun 16, 2023

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How to Maximize PCIe 6.0’s Advantages with End-to-End PCIe Design Solutions

By Madhumita Sanyal, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP, Verification

Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

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4 min read/Jun 13, 2023

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Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

By Andy Tai, Ramesh Narayanaswamy

Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification

Reduce Integration Risks for High-Speed Applications with PCIe 5.0-Compliant Synopsys IP

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6 min read/Mar 02, 2023

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Reduce Integration Risks for High-Speed Applications with PCIe 5.0-Compliant Synopsys IP

By Richard Solomon, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Keysight Validates PCIe 6.0 Specification's Speed

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3 min read/Feb 21, 2023

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Keysight Validates PCIe 6.0 Specification's Speed

By Gary Ruggles

Tags: Customer Spotlight, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

How PCIe's TDISP Architecture Improves Interface Security

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5 min read/Feb 08, 2023

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How PCIe's TDISP Architecture Improves Interface Security

By Dana Neustadter, Richard Solomon

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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/Feb 02, 2023

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The Future of HPC: Predictions for 2023

By Rita Horner, Charlie Matar

Tags: Chip Design Insights, HPC, Data Center

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6 min read/Jan 10, 2023

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5 Cloud Predictions to Watch in 2023

By Vikram Bhatia, Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

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10 min read/Dec 19, 2022

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2022's EDA & Chip Design Advancements

By Synopsys Editorial Staff

Tags: Multi-Die System, AI & Machine Learning, Prototyping, Emulation, Interface IP, Inside Synopsys, Cloud, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification

Why Reliability, Availability & Serviceability Matter in HPC

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5 min read/Dec 14, 2022

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Why Reliability, Availability & Serviceability Matter in HPC

By Rita Horner, Pawini Mahajan, Charlie Matar

Tags: Chip Design Insights, Design, HPC, Data Center, Silicon IP

Get the Most Out of Your Next-Generation PCIe 6.0.1 Design

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1 min read/Sep 15, 2022

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Get the Most Out of Your Next-Generation PCIe 6.0.1 Design

By Richard Solomon

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

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6 min read/Sep 05, 2022

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What is Compute Express Link (CXL) 3.0?

By Madhumita Sanyal, Richard Solomon, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Enhancing Chip Verification with AI and Machine Learning

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4 min read/Jul 12, 2022

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Enhancing Chip Verification with AI and Machine Learning

By Rob van Blommestein

Tags: Multi-Die System, Static Verification, AI & Machine Learning, Product Spotlight, Debug, Chip Design Insights, Simulation, HPC, Data Center, Verification, Formal Verification

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5 min read/Jul 11, 2022

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What is a SmartNIC?

By Rita Horner

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Security IP, Foundation IP, HPC, Data Center, Silicon IP, Verification, 3DIC Design

Data Center Journey: Data Volume Growth & Moore's Law

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6 min read/Jun 16, 2022

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Data Center Journey: Data Volume Growth & Moore's Law

By Mike Gianfagna

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, 5G Wireless, HPC, Data Center

How Chip Floorplan Design Automation Accelerates Chip Design

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6 min read/Jun 06, 2022

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How Chip Floorplan Design Automation Accelerates Chip Design

By Preeti Jain

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Design, Manufacturing, HPC, Data Center

What's New in the PCIe 6.0 Specification: Bandwidth & Security

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7 min read/Apr 26, 2022

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What's New in the PCIe 6.0 Specification: Bandwidth & Security

By Dana Neustadter, Priyank Shukla, Gary Ruggles

Tags: AI & Machine Learning, Chip Design Insights, Internet of Things, Interface IP, HPC, Data Center, Silicon IP

How Optical Interconnects Enable Data Center Disaggregation

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6 min read/Apr 19, 2022

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How Optical Interconnects Enable Data Center Disaggregation

By Manmeet Walia, Manuel Mota

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

2022: The Year of Cloud-Based Chip Design & Verification

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7 min read/Mar 22, 2022

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2022: The Year of Cloud-Based Chip Design & Verification

By Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

SNUG Silicon Valley 2022: Synopsys Users Group

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2 min read/Mar 14, 2022

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SNUG Silicon Valley 2022: Synopsys Users Group

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification, Inside Synopsys

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5 min read/Feb 23, 2022

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What are Co-Packaged Optics?

By Jigesh Patel, Priyank Shukla, Mitch Heins, Scott Durrant

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

How 800G Ethernet & Industry Standards Enable Innovation

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9 min read/Feb 02, 2022

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How 800G Ethernet & Industry Standards Enable Innovation

By Daniel Koehler, John Swanson

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

The PCIe 5.0 Standard is Here: IP, Designs & Applications

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5 min read/Jan 25, 2022

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The PCIe 5.0 Standard is Here: IP, Designs & Applications

By Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

The Future of High-Performance Computing: Key Predictions for 2022

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7 min read/Jan 19, 2022

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The Future of High-Performance Computing: Key Predictions for 2022

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Verification

System Interoperability's Impact on Hyperscale Data Centers

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5 min read/Jan 18, 2022

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System Interoperability's Impact on Hyperscale Data Centers

By Priyank Shukla, Madhumita Sanyal

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Hyper-Convergent Chip Designs: News & Trends

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2 min read/Dec 15, 2021

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Hyper-Convergent Chip Designs: News & Trends

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design, HPC, Data Center

How SoC IP Powers High-Performance Computing Applications

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7 min read/Nov 16, 2021

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How SoC IP Powers High-Performance Computing Applications

By Scott Durrant

Tags: Chip Design Insights, HPC, Data Center, Silicon IP

Meeting Ethernet Bandwidth Demand: 1.6T Ethernet Standard

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5 min read/Nov 02, 2021

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Meeting Ethernet Bandwidth Demand: 1.6T Ethernet Standard

By John Swanson, Anika Malhotra

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

High-Performance Computing Drives Demand for Chiplets

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5 min read/Sep 14, 2021

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High-Performance Computing Drives Demand for Chiplets

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, HPC, Data Center, Silicon IP

Silicon-Proven IP for SoC Design in HPC Applications

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8 min read/Aug 16, 2021

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Silicon-Proven IP for SoC Design in HPC Applications

By Scott Durrant

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Enabling 800G Ethernet Bandwidth for Hyperscale Data Centers

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5 min read/Jul 27, 2021

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Enabling 800G Ethernet Bandwidth for Hyperscale Data Centers

By Priyank Shukla, John Swanson, Anika Malhotra

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP, Verification

Aaroh Labs Advanced-Node Semiconductor Designs

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3 min read/Jul 26, 2021

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Aaroh Labs Advanced-Node Semiconductor Designs

By Rob van Bloomestein

Tags: Customer Spotlight, Chip Design Insights, Design, Internet of Things, HPC, Data Center, Verification

Boosting Chip Verification with Fast SoC Emulation

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4 min read/Jul 12, 2021

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Boosting Chip Verification with Fast SoC Emulation

By Dr. Johannes Stahl

Tags: AI & Machine Learning, Chip Design Insights, 5G Wireless, Automotive, HPC, Data Center, Verification

Die-to-Die Interfaces for Data Centers Bandwidth & Latency

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4 min read/Jun 02, 2021

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Die-to-Die Interfaces for Data Centers Bandwidth & Latency

By Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Tachyum's Prodigy HPC Processor for Hyperscale Data Centers

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5 min read/May 31, 2021

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Tachyum's Prodigy HPC Processor for Hyperscale Data Centers

By Synopsys Editorial Staff

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, HPC, Data Center, Silicon IP

Faster Chiplet & SoC Design: Collaboration with Arm

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4 min read/May 25, 2021

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Faster Chiplet & SoC Design: Collaboration with Arm

By Michael Posner, Neel Desai

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Interface IP, HPC, Data Center, Silicon IP, Verification

Hyper-Convergent Chip Designs: All or Nothing Approach

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5 min read/May 18, 2021

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Hyper-Convergent Chip Designs: All or Nothing Approach

By Mike Gianfagna

Tags: Chip Design Insights, Design, HPC, Data Center

Integrated Chip Design Tools for IC Hyperconvergence

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4 min read/Apr 06, 2021

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Integrated Chip Design Tools for IC Hyperconvergence

By Raja Tabet, Anand Thiruvengadam

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Silicon IP

PCIe 6.0's Impact on High-Performance Computing Solutions

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4 min read/Mar 24, 2021

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PCIe 6.0's Impact on High-Performance Computing Solutions

By Priyank Shukla, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

Next-Gen Ethernet Connectivity for Hyperscale Data Centers

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3 min read/Feb 16, 2021

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Next-Gen Ethernet Connectivity for Hyperscale Data Centers

By Priyank Shukla, Manmeet Walia

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP

High-Performance Computing & Cloud Predictions for 2021

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7 min read/Dec 15, 2020

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High-Performance Computing & Cloud Predictions for 2021

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center

Die-to-Die Connectivity for High-Performance Computing

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7 min read/Nov 30, 2020

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Die-to-Die Connectivity for High-Performance Computing

By Scott Durrant

Tags: Multi-Die System, Chip Design Insights, HPC, Data Center, Silicon IP

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