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SiMa.ai faced a choice.
The Silicon Valley startup was getting ready to design their second-generation family of systems-on-chip (SoCs), called Modalix. It was an ambitiously complex project: a single silicon die offered in multiple performance variants, with the option to package it in a pin-compatible system-on-module (SoM) for easy integration. Not only would Modalix be built for multimodal machine learning (ML) and generative AI applications — it also needed to run those workloads directly on devices.
The key question: Should SiMa.ai outsource the project or tackle it themselves?
The company relied on a turnkey ASIC partner for their first-gen MLSoC and achieved bug-free A0 silicon with just a 30-person team. Most assumed they would do the same for Modalix. But startups thrive on gutsy calls, and SiMa.ai wanted to take their chip design abilities to the next level.
“We got a little more adventurous,” says Srivi Dhruvanarayan, SiMa.ai vice president of hardware engineering. "We decided to do the whole flow ourselves, all the way from concept to production.”
The bold move paid off in spades.
In just eighteen months, SiMa.ai completed their entire Customer-Owned Tooling (COT) flow from initial functional hardware description (RTL) to tape-out. And once again, they achieved successful, bug-free A0 silicon.
Dhruvanarayan credits Synopsys for playing a critical role throughout the process, providing invaluable expertise and a tightly integrated suite of design, verification, signoff, and IP solutions.
“We could have gone with multiple vendors, but Synopsys was the one provider that could help us with everything,” he says. “It was an easy call.”
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High-performance power play
The tape-out of the cutting-edge Modalix marked a significant milestone. Not only for a chip developer founded less than a decade ago, but also in the evolution of physical AI — purpose-built ML embedded at the edge in devices such as robots, drones, and smart cameras.
“You have the chip doing the AI inference right there in that device without having to connect to the cloud,” explains Dhruvanarayan. “We do this with low power so the device doesn’t need to recharge as often, without compromising performance.”
SiMa.ai says Modalix delivers the industry’s first SoCs for multimodal physical AI, capable of supporting convolutional neural networks, transformers, large language models (LLMs), large multimodal models (LMMs), and generative AI with 10 times the performance per watt of alternatives.
Configured as a four-chip cluster, Modalix delivers up to 200 TOPS (Tera Operations Per Second), rivaling industry-leading GPUs. And with an optional SoM that includes memory, power, and I/O, customers can replace or upgrade GPU-based solutions without redesigning their existing carrier boards.
“Our SoM is pin compatible,” says Dhruvanarayan, “so they can swap it and gain the benefit of lower power and more performance.”
The strategy seems to be working.
“The module is selling like hotcakes,” he says. “We are seeing the beginning of hockey stick growth.”
Architecting edge intelligence
To create this inflection point, SiMa.ai had to overcome multiple design challenges for a chip at the right size and price — without missing the window of opportunity.
“For a startup, time-to-market is always a challenge,” says Dhruvanarayan. “We now have a 25 mm2 chip with enough bells and whistles to make it very competitive in the market.”
Architected as a heterogeneous compute chip, Modalix features an ARM AArch64 CPU, Synopsys EV74 digital signal processor (DSP) for computer vision, and its own custom programmable ML accelerator, each on separate islands within the same SoC. All major high-speed and interface IP solutions were sourced from Synopsys — including LPDDR5, PCIe Gen5, multiple 10G Ethernet ports, and MIPI camera interfaces — which needed to be tightly integrated with the custom ML cores.
“There was a lot of back-and-forth with Synopsys during the implementation and verification stages,” says Dhruvanarayan. “They pretty much held our hand with all their IPs that we purchased.”
Maximizing the high-speed interfaces and DRAM bandwidth were key to overall SoC performance, so SiMa.ai leaned heavily on Synopsys expertise for IP hardening — particularly for LPDDR5 and PCIe Gen5.
“If you look at all the machine learning chips out there utilizing 7 billion or 10 billion parameter models, you never have enough DRAM bandwidth,” says Dhruvanarayan. “Most of the models become memory-bound.”
Emulating interactions
Software presented other challenges. In addition to implementing new features, SiMa.ai wanted to ensure the platform would be backward compatible with their first-gen SoC. And with the heterogeneous architecture, software has to manage all three compute engines, requiring three different compilers and a way to control the pipeline and distribution of compute tasks through DRAM.
Dhruvanarayan and his team used Synopsys ZeBu emulation systems to optimize the critical interaction between hardware and software.
“Both of those met on the emulator for the first time, which resulted in extensive performance and power analysis,” he says. “Using ZeBu, we were able to run Llama model workloads even before the chip arrived, and that helped us gain confidence in the health of the design and maturity of the software.”
The SiMa.ai team also took full advantage of their early access to the new ZeBu Empower power measurement tool.
“The amazing thing is the performance and power numbers on ZeBu came within a single-digit percentage of the actual numbers on the chip,” says Dhruvanarayan.
To achieve A0 silicon success on Modalix, SiMa.ai deployed a comprehensive suite of Synopsys EDA tools, including Fusion Compiler, Formality, PrimeTime and PrimePower, IC Validator, StarRC, and Redhawk Analysis Fusion.
Acceleration in progress
SiMa.ai is not slowing down. In parallel to a third-generation MLSoC, which will further customize its flexible architecture for LLMs, the company is also partnering with Synopsys on an automotive-compliant chiplet.
“There is a whole lot of interest starting to show already,” says Dhruvanarayan, “and based on customer needs we may develop a complete automotive SoC.”
By betting on in-house innovation and choosing the right partner, SiMa.ai didn’t just deliver bug-free A0 silicon — they set the stage for a new era of physical AI performance.
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