BLOG Jul 06, 2026/5 min read

BLOG

When AI Gets a Body: From Cloud Intelligence to Physical Systems

By Hezi Saar

Tags: Engineering Central, AI & Machine Learning, Silicon IP

BLOG Jun 30, 2026/6 min read

BLOG

Enabling the Next Generation of AI Infrastructure with Ethernet for Scale-Up Networking (ESUN)

By Abhinav Kothiala

Tags: Engineering Central, Interface IP, Silicon IP

BLOG Jun 30, 2026/5 min read

BLOG

Taming Advanced Node Physical Verification – Customer Perspective

By Gnana Kanagaratnam

Tags: Engineering Central, Physical Verification, Design, Verification

BLOG Jun 30, 2026/2 min read

BLOG

Advancing UCIe Performance: Enabling 40G for Next-Generation Multi-Die Designs

By Manuel Mota

Tags: Multi-Die, Engineering Central, Interface IP, Silicon IP

BLOG Jun 17, 2026/5 min read

BLOG

Breaking the Design Closure Bottleneck with Timing-Aware Multiphysics ECO

By Manoj Chacko

Tags: Engineering Central, Design, Multiphysics Fusion

BLOG Jun 02, 2026/4 min read

BLOG

Synopsys PCIe Leadership Recognized: Paul Cassidy Joins a Track Record of PCI-SIG Contribution

By Magaly Sandoval-Pichardo

Tags: Engineering Central, Interface IP, Silicon IP

BLOG May 26, 2026/4 min read

BLOG

Predicting Silicon Behavior Years before Test Wafers

By Dr. Larry Melvin

Tags: Engineering Central, Mask Solutions, Manufacturing

BLOG May 08, 2026/5 min read

BLOG

The Future of System Software Testing Is Agentic

By Robert Fey

Tags: Engineering Central, Verification, Virtual Prototyping

BLOG May 07, 2026/5 min read

BLOG

Transforming Server Architecture for AI Workloads

By Sumit Vishwakarma

Tags: Data Center, Engineering Central, AI & Machine Learning, Design, About Synopsys, Interface IP, HPC, Data Center, Silicon IP

BLOG May 04, 2026/3 min read

BLOG

Multi‑Die Design in Context: A Clear Comparison with Monolithic and PCB Designs

By Amlendu Shekhar Choubey

Tags: Multi-Die, Engineering Central

BLOG May 01, 2026/4 min read

BLOG

Fusion Compiler Parametric Scenario Extension: Scaling Design Scenarios Without Scaling Risk

By James Chuang

Tags: Engineering Central

BLOG Apr 29, 2026/3 min read

BLOG

New Synopsys.ai Copilots Deliver 2–5× Faster Chip Design Productivity

By Anand Thiruvengadam

Tags: Static & Formal Verification, AI & Machine Learning, Debug, Test, About Synopsys, Physical Implementation, Signoff, IDE, Static Verification, Engineering Central, Design, Verification, Formal Verification

BLOG Apr 28, 2026/4 min read

BLOG

Improving the Efficiency of Custom Routing Implementation for CMOS Image Sensors Using the Custom Compiler Co-Design Flow

By Hiromitsu Fujii

Tags: Engineering Central, Custom Implementation, Design, AMS Simulation

BLOG Apr 28, 2026/1 min read

BLOG

The Silicon Horizon: The Next Decade for the Chip Industry

By Vikram Bhatia

Tags: Cloud, Engineering Central, AI & Machine Learning

BLOG Apr 15, 2026/4 min read

BLOG

Interface IP: The Keystone for 3D Multi-Die Designs

By Madhumita Sanyal

Tags: Multi-Die, Engineering Central, Design, About Synopsys, Interface IP, Silicon IP

BLOG Apr 10, 2026/3 min read

BLOG

Kioxia Advances SoC Design with Cutting-Edge EDA and AI Technologies

By Hiromitsu Fujii

Tags: Engineering Central, Design, Physical Implementation

BLOG Apr 08, 2026/5 min read

BLOG

Toshiba Enhances Memory BIST Flow with Synopsys TestMAX Manager

By Hiromitsu Fujii

Tags: Customer Spotlight, Engineering Central, Test, Design

BLOG Apr 08, 2026/5 min read

BLOG

Delivering Automotive-Grade Quality with Customized FinFET Foundation IP

By Nafiz Ahmed, Andrew Appleby, Daryl Seitzer

Tags: Customer Spotlight, Engineering Central, About Synopsys, Energy-Efficient SoCs, Foundation IP, Automotive, Silicon IP

BLOG Apr 07, 2026/5 min read

BLOG

Four Ways UALink 2.0 Advances AI Scale Up

By Priyank Shukla

Tags: Engineering Central, Interface IP, Silicon IP

BLOG Apr 01, 2026/2 min read

BLOG

Synopsys Advances Die‑to‑Die Connectivity with 64G UCIe IP Tape‑Out

By Synopsys Editorial Staff

Tags: Multi-Die, Engineering Central, Interface IP, Silicon IP

BLOG Mar 30, 2026/4 min read

BLOG

KIOXIA Leads the Way in Optimizing Simulation Verification: A Deep Dive into PrimeSim HT and VC Execution Manager

By Hiromitsu Fujii

Tags: Engineering Central, Design, AMS Simulation

BLOG Mar 30, 2026/4 min read

BLOG

Advancing In-House Microcontroller Development at Sony Semiconductor Solutions with Synopsys Tools

By Hiromitsu Fujii

Tags: Engineering Central, Processor Solutions, Silicon IP

BLOG Mar 30, 2026/7 min read

BLOG

Is Your Voltage Drop Flow Obsolete? Leading Design Teams are Rethinking Dynamic Voltage Drop (DVD)

By Marc Swinnen

Tags: Engineering Central, Design, Signoff

BLOG Mar 24, 2026/2 min read

BLOG

Safety-Aware Multi-Die ML Architectures for the AI-Defined Vehicle: Synopsys & SiMa.ai

By Synopsys Editorial Staff

Tags: Multi-Die, Engineering Central, Automotive

BLOG Mar 24, 2026/1 min read

BLOG

Innovation Blooms Here: Celebrating Women at NVIDIA GTC

By Debbie Chiu

Tags: Engineering Central

BLOG Mar 23, 2026/5 min read

BLOG

Accelerating Next-Generation EMIB-T Packaging: A Collaboration Between Synopsys and Intel Foundry

By Arun Bhattacharya

Tags: Multi-Die, Engineering Central, Design, 3DIC Design

BLOG Mar 19, 2026/5 min read

BLOG

Jumpstart Chip Design with Digital Instance 2.0: Ready to Use, Configurable RTL2GDS Flow on Cloud

By Atul Walimbe, Anuj Pant

Tags: Cloud, Engineering Central, Design

BLOG Mar 19, 2026/3 min read

BLOG

Introducing the World’s First AI-Powered Analog Layout Synthesis

By Yuval Shay, Sumit Vishwakarma

Tags: Engineering Central, AI & Machine Learning, Custom Implementation, Design, About Synopsys, Physical Implementation, Signoff, Verification, Analog Design

BLOG Mar 18, 2026/4 min read

BLOG

OFC 2026: IEEE 802.3 Launches a Study Group for 400 Gbps Per Lane Ethernet for AI Networks

By Priyank Shukla, Magaly Sandoval-Pichardo, Kent Lusted

Tags: Engineering Central, Interface IP, Silicon IP

BLOG Mar 18, 2026/4 min read

BLOG

AI-Driven Accelerated Bug Discovery and Coverage Closure

By Taruna Reddy

Tags: Engineering Central, AI & Machine Learning, Simulation, Verification

BLOG Mar 11, 2026/7 min read

BLOG

Software-Defined Hardware-Assisted Verification: A New Benchmark for AI-Era Chip Design

By Tom De Schutter, Frank Schirrmeister

Tags: Engineering Central, AI & Machine Learning, Prototyping, Design, Emulation, About Synopsys, HPC, Data Center, Verification

BLOG Mar 11, 2026/4 min read

BLOG

New Synopsys Multiphysics Fusion™ Technology Set to Transform Chip and Product Engineering

By Marc Swinnen

Tags: Multi-Die, AI & Machine Learning, 3DIC Design, About Synopsys, Physical Implementation, Energy-Efficient SoCs, Signoff, Engineering Central, Signal & Power Integrity, Fusion Technology, Design, Fusion Design Platform, 5nm and Below, HPC, Data Center

BLOG Mar 09, 2026/4 min read

BLOG

Synopsys Silver Now Supports Virtualization of POSIX-style ECUs for Deterministic Software-in-the-Loop Simulations

By Nicolas Amringer, Stefan Pruisken

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Mar 09, 2026/3 min read

BLOG

Industry First Verification IP for Arm AMBA AXI-L: Simplifying Complex Verification in Evolving AXI Specifications

By Gunjan Kumar Gupta

Tags: Engineering Central, Verification IP, HPC, Data Center, Verification

BLOG Mar 05, 2026/3 min read

BLOG

World First: Synopsys MACsec IP Receives ISO/PAS 8800 Certification for Automotive and Physical AI Security

By Pavithra C Suriyanarayanan

Tags: Engineering Central, AI & Machine Learning, Security IP, About Synopsys, Interface IP, Automotive, Silicon IP

BLOG Mar 03, 2026/4 min read

BLOG

Accelerating Multi-Die Innovation: How Synopsys and Samsung are Shaping Chip Design

By Amlendu Shekhar Choubey

Tags: Multi-Die, AI & Machine Learning, 3DIC Design, About Synopsys, Physical Implementation, Interface IP, Signoff, Engineering Central, Silicon Lifecycle Management, Signal & Power Integrity, Design, Manufacturing, Design Technology Co-Optimization, Silicon IP

BLOG Feb 27, 2026/3 min read

BLOG

Using AI to Debug More Quickly and Accurately

By Taruna Reddy

Tags: Engineering Central, AI & Machine Learning, Debug, Verification

BLOG Feb 27, 2026/3 min read

BLOG

World’s First HBM4 IP Test Chip: Early Silicon Validation for Next-Generation AI and HPC

By Brett Murdock

Tags: Multi-Die, Engineering Central, Interface IP, Silicon IP

BLOG Feb 20, 2026/6 min read

BLOG

Accelerate Energy Efficient Compute Designs with Synopsys CXL 3.0 Verification IP

By Rohitash Shukla

Tags: Engineering Central, Verification IP, HPC, Data Center, Verification

BLOG Feb 20, 2026/4 min read

BLOG

Verifying High Performance NVMe Designs for Next-gen Workloads with Synopsys NVMe VIP

By Viral Sharma, Dhruv Garg

Tags: Engineering Central, Verification IP, HPC, Data Center, Verification

BLOG Feb 13, 2026/3 min read

BLOG

The Strategic Role of Glitch Detection IP in Modern SoCs

By Rohan Bhatnagar

Tags: Engineering Central, Silicon Lifecycle Management

BLOG Jan 30, 2026/4 min read

BLOG

Designing the Future: How 3DIC Compiler Is Powering Breakthroughs Across the MultiDie Design Landscape

By Shekhar Kapoor

Tags: Multi-Die, Engineering Central, Design, 3DIC Design

BLOG Jan 23, 2026/5 min read

BLOG

Industry’s First PCIe 8.0 Verification IP: Powering AI, HPC, Automotive, and LLM Storage Innovations

By Deepak Kumar Lnu, Will Felten

Tags: Engineering Central, AI & Machine Learning, Prototyping, Emulation, HPC, Data Center, Verification

BLOG Jan 20, 2026/4 min read

BLOG

Delivering LPDDR6 Read/Write Eyes at 10.67 Gb/s — Powering Memory for Mobile, AI & Embedded Systems

By Brett Murdock

Tags: Engineering Central, Interface IP, Silicon IP

BLOG Jan 06, 2026/4 min read

BLOG

Accelerating AI-Enabled Vehicles with NXP S32N7 and Synopsys Virtual Development Kits

By Marc Serughetti

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Jan 06, 2026/4 min read

BLOG

TDA5 SoCs and Synopsys VDK: Powering Safe, Scalable AI for Autonomous Driving

By Marc Serughetti

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Jan 06, 2026/4 min read

BLOG

Driving the Future of Mobility: New Virtual Prototypes for Arm Zena CSS and SOAFEE Workflows with Synopsys Virtualizer Native Execution

By Marc Serughetti, Malte Doerper

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Dec 23, 2025/4 min read

BLOG

LPDDR6 Verification IP for AI, Automotive, HPC, and Mobile SoCs

By Rishikumar Chauhan

Tags: Engineering Central, AI & Machine Learning, Memory, Verification IP, Verification

BLOG Dec 18, 2025/3 min read

BLOG

Industry’s First Verification IP for Arm AMBA DTI-H

By Sairam Kolapalli, Gunjan Kumar Gupta

Tags: Engineering Central, AI & Machine Learning, Verification IP, Verification

BLOG Dec 18, 2025/2 min read

BLOG

Industry 1st CXL 4.0 Verification IP: Transforming AI and HPC Systems

By Sangeeta Kulkarni

Tags: Engineering Central, HPC, Data Center, Verification

BLOG Dec 12, 2025/2 min read

BLOG

Examining Data Bus Inversions (DBIs) for LPDDR in StatEye

By Ted Mido

Tags: Engineering Central, Interface IP, Silicon IP

BLOG Dec 08, 2025/3 min read

BLOG

Evolution of PVT IP: From Analog Mixed Signal (AMS) to Digitally Assisted Analog (DAA) Architecture

By Rohan Bhatnagar

Tags: Engineering Central, Silicon Lifecycle Management

BLOG Dec 07, 2025/5 min read

BLOG

AI in Software Testing

By Robert Fey

Tags: Engineering Central, AI & Machine Learning, Design, Test Automation

BLOG Dec 04, 2025/5 min read

BLOG

Verification in the AI Era: Scaling to Quadrillions of Cycles with Software-Driven Hardware-Assisted Verification

By Tom De Schutter, Frank Schirrmeister

Tags: Engineering Central, AI & Machine Learning, Prototyping, Verification

BLOG Nov 19, 2025/5 min read

BLOG

CXL 4.0, Bandwidth First: What Designers Are Solving for Next

By Ron Lowman

Tags: Engineering Central, Interface IP, Silicon IP

BLOG Nov 07, 2025/8 min read

BLOG

Are You Stuck in PCIe Traffic? From Software to Hardware to System

By Johannes Stahl

Tags: Engineering Central, AI & Machine Learning, Prototyping, Emulation, Interface IP, HPC, Data Center, Silicon IP, Verification

BLOG Nov 06, 2025/5 min read

BLOG

10 Tips for First-Pass Silicon Success in AI Chip Development

By Rita Horner, Todd Koelling, Frank Schirrmeister

Tags: Multi-Die, AI & Machine Learning, Test, Emulation, About Synopsys, Physical Implementation, Signoff, Virtual Prototyping, Engineering Central, Silicon Lifecycle Management, Design, HPC, Data Center, Silicon IP, Verification

BLOG Oct 23, 2025/2 min read

BLOG

Accurate High Frequency Jitter Amplification Predictions in StatEye

By Ted Mido

Tags: Engineering Central, Design, AMS Simulation

BLOG Oct 23, 2025/5 min read

BLOG

Predictable Design Optimization and Closure with Fusion Compiler Adaptive Scenario Compression

By Nahmsuk Oh, James Chuang

Tags: Engineering Central, Design, Physical Implementation

BLOG Oct 21, 2025/4 min read

BLOG

UFS 5.0 Verification Solutions for Mobile, Automotive, and AI Storage

By Amitkumar Gound, Saksham Gupta

Tags: Engineering Central, Emulation, Verification IP, Storage, Verification

BLOG Oct 15, 2025/4 min read

BLOG

Realize Up to 5x Faster Timing Signoff with FlexEDA

By Manoz Palaparthi, Anuj Pant

Tags: Cloud, Engineering Central, Design, Signoff

BLOG Oct 13, 2025/5 min read

BLOG

Addressing AI and HPC Chip Test Challenges with TestMAX SEQ Compression and Streaming Fabric

By Sri Ganta, Jon Colburn

Tags: Engineering Central, Design, Test Automation

BLOG Oct 08, 2025/4 min read

BLOG

Building and Validating FreeRTOS-Based virtual ECUs with Synopsys Silver: A Comprehensive Approach

By Markus Stix, Stefan Pruisken

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Oct 07, 2025/3 min read

BLOG

How Advanced Memory Testing and Flexible Tooling Delivers Rapid Silicon Validation for ML Edge Innovators

By Pawini Mahajan

Tags: Customer Spotlight, Engineering Central, Design, Test Automation

BLOG Oct 01, 2025/1 min read

BLOG

AI Chip Design Startup Forum 2025 - Panel Discussion

By Synopsys Editorial Staff

Tags: Cloud, Engineering Central

BLOG Sep 17, 2025/7 min read

BLOG

Formal ISA Verification for Custom-designed Processors

By Bjoern Hartmann

Tags: Engineering Central, Processor Solutions, Silicon IP

BLOG Sep 07, 2025/1 min read

BLOG

“Shift-Left” Software Defined Vehicle Development Through Embedded Validation With Virtual ECUs

By Stefan Pruisken

Tags: Engineering Central, Verification, Virtual Prototyping

BLOG Aug 31, 2025/1 min read

BLOG

TPT Release 2025.09

By Robert Fey

Tags: Engineering Central, Verification, Virtual Prototyping

BLOG Aug 18, 2025/5 min read

BLOG

Accelerating PCIe Gen6 L0p Verification for AI & HPC Designs using Synopsys VIP

By Deepak Kumar Lnu, Will Felten

Tags: Engineering Central, AI & Machine Learning, Verification IP, Automotive, HPC, Data Center, Verification

BLOG Jul 18, 2025/3 min read

BLOG

Verification of UALink (UAL) and Ultra Ethernet (UEC) Protocols for Scalable HPC/AI Networks using Synopsys VIP

By Ashutosh Agrawal, Pushpal Nautiyal

Tags: Engineering Central, Verification IP, HPC, Data Center, Verification

BLOG May 19, 2025/5 min read

BLOG

Driving the Future: Renesas R-Car Generation 5 Virtual Prototypes Enable Software Defined Vehicles

By Sylvain Bayon De Noyer

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Apr 22, 2025/6 min read

BLOG

Turbocharging AI: How Hardware-Assisted Verification Fuels the Revolution

By Johannes Stahl

Tags: Engineering Central, AI & Machine Learning, Prototyping, Emulation, Verification

BLOG Mar 31, 2025/6 min read

BLOG

A Novel Approach to Speeding Up PCIe 6.0+ Designs - Compliance Load Board Verification

By Deepak Kumar Lnu

Tags: Engineering Central, AI & Machine Learning, Verification IP, HPC, Data Center, Verification

BLOG Jan 27, 2025/4 min read

BLOG

Validation of AUTOSAR Classic ECUs Running Rust SWCs: A Safer Path to Automotive Software

By Nicolas Amringer, Stefan Pruisken

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Sep 12, 2024/2 min read

BLOG

Industry First Verification IP for Arm AMBA DTI-G

By Gunjan Kumar Gupta

Tags: Data Center, Engineering Central, Internet of Things, Verification IP, Automotive, Verification

BLOG Sep 10, 2024/2 min read

BLOG

The Journey of Coverage Closure

By Taruna Reddy

Tags: Engineering Central, AI & Machine Learning, Simulation, Verification

BLOG Aug 08, 2024/3 min read

BLOG

UCIe 2.0 - Setting the Tone for Chiplet Interoperability

By Prasad Subudhi K. S, Deepak Nagaria, Narasimha Babu G V L

Tags: Multi-Die, Engineering Central, Verification IP, Verification

BLOG Jul 10, 2024/4 min read

BLOG

How Synopsys is Enabling Pioneering South Korean Startup Rebellions to Redefine the World of Energy-efficient AI Computing

By Jinwook Oh, Johannes Stahl

Tags: Engineering Central, AI & Machine Learning, Emulation, Verification, Virtual Prototyping

BLOG Jun 28, 2024/7 min read

BLOG

AutoSens Detroit 2024: Automotive EE Architectures - Quo Vadis

By Frank Schirrmeister

Tags: Engineering Central, Automotive, Verification

BLOG Jun 26, 2024/3 min read

BLOG

Accelerate RISC-V Verification Using Synopsys Cloud

By Anuj Pant

Tags: Cloud, Engineering Central, Verification

BLOG Jun 14, 2024/4 min read

BLOG

Synopsys Ethernet 1.6T Verification IP and Protocol Solutions for Next-Generation Networking and Communication Systems

By Laxmi Narayan

Tags: Cloud, Engineering Central, AI & Machine Learning, Emulation, Verification IP, HPC, Data Center, Verification

BLOG Jun 13, 2024/2 min read

BLOG

Verdi Waveform Utilities: Get More Done with Faster Runtime and Less Memory

By Lauren Wu, Robert Ruiz

Tags: Engineering Central, Debug, Verification

BLOG Jun 13, 2024/2 min read

BLOG

Industry's First Verification IP for PCIe 7.0

By Aditi Sharma

Tags: Engineering Central, AI & Machine Learning, Verification IP, Verification

BLOG May 23, 2024/4 min read

BLOG

Streamlining Camera Security Validation Framework Using Synopsys MIPI CSE v2.0 VIP

By Andrew Elias, SriDeepti Pisipati

Tags: Engineering Central, Verification IP, Automotive, Verification

BLOG May 10, 2024/3 min read

BLOG

Verification Viewpoints: Shift Left with Sanity Testing

By Keith Redmond

Tags: Engineering Central, Silicon IP, Verification

BLOG May 09, 2024/3 min read

BLOG

Interactive Debugging: Reduce Your Simulation Debug Turnaround Time

By Vita Liao

Tags: Engineering Central, Debug, Simulation, Verification

BLOG Apr 11, 2024/4 min read

BLOG

Verifying CXL 3.1 Designs with Synopsys Verification IP

By Zongyao Wen, Nikhil Jain

Tags: Engineering Central, Verification IP, Verification

BLOG Apr 10, 2024/4 min read

BLOG

Customer Spotlight: NXP's S32N Family of Processors Enables Vehicle Super-Integration for Central Compute Applications

By Marc Serughetti

Tags: Engineering Central, Automotive, Verification, Virtual Prototyping

BLOG Mar 15, 2024/8 min read

BLOG

Industry Leaders Discuss “Overcoming the Challenges of Multi-die Systems Verification”

By Verification Expert

Tags: Multi-Die, Engineering Central, Verification

BLOG Mar 15, 2024/4 min read

BLOG

Synopsys and Arm Collaboration -Accelerating Development and Innovation for Arm-based Automotive Systems

By Marc Serughetti

Tags: Engineering Central, Design, Automotive, Verification, Virtual Prototyping

BLOG Mar 06, 2024/5 min read

BLOG

Industry's First Verification IP for Arm AMBA CHI-G

By Sudhanshu Rao

Tags: Multi-Die, Engineering Central, Verification IP, Verification

BLOG Feb 27, 2024/2 min read

BLOG

Verification Viewpoints: A New Blog Series for Today's Verification Expert

By Keith Redmond

Tags: Engineering Central, Silicon IP, Verification

BLOG Feb 22, 2024/5 min read

BLOG

Synopsys AMBA CHI C2C System Verification Solutions

By Venkatesh Kudumula

Tags: Multi-Die, Engineering Central, Verification IP, Verification

BLOG Feb 07, 2024/5 min read

BLOG

A Pain in the X! Why Debugging Xs can be Difficult

By Myles Glisson

Tags: Engineering Central, Debug, Verification

BLOG Nov 21, 2023/5 min read

BLOG

Running X-Propagation with Low-Power Simulation

By Manas Ranjan Raiguru

Tags: Engineering Central, Simulation, Verification

BLOG Nov 16, 2023/2 min read

BLOG

Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event

By Mohit Bhardwaj

Tags: Engineering Central, Verification IP, Verification

BLOG Oct 01, 2023/7 min read

BLOG

Synopsys Users & Experts Come Together Again for Annual VC Formal SIG Event

By Yann Antonioli

Tags: Engineering Central, Verification, Formal Verification

BLOG Aug 07, 2023/3 min read

BLOG

Optimize UCIe 1.1 Verification with Synopsys VIP Solutions

By Varun Agrawal

Tags: Engineering Central, Verification IP, Verification

BLOG Jul 12, 2023/2 min read

BLOG

Streamline Projects with Verdi and VCS Coverage Tools

By Taruna Reddy

Tags: Engineering Central, Debug, Simulation, Verification, Formal Verification

BLOG Jun 25, 2023/3 min read

BLOG

AI & Math Core Verification: Datapath Validation

By Jin Zhang

Tags: Engineering Central, Verification, Formal Verification

BLOG Jun 06, 2023/4 min read

BLOG

Comprehensive TSN Verification Solution by Synopsys

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG May 08, 2023/5 min read

BLOG

Optimize NAND Flash Memory Verification: Part 1

By Mohit Bhardwaj, Varun Agrawal

Tags: Engineering Central, Verification

BLOG Mar 13, 2023/5 min read

BLOG

Ready for HBM2E? 2x More SoC Capacity, 50% More Speed

By VIP Expert

Tags: Engineering Central, Verification

BLOG Mar 06, 2023/4 min read

BLOG

Revolutionary Verification IPs for Arm AMBA 5 AXI-J, APB-E

By VIP Expert

Tags: Engineering Central, Verification

BLOG Feb 27, 2023/4 min read

BLOG

Enhancing Arm SoCs Performance with Smart Monitors

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jan 29, 2023/4 min read

BLOG

Accelerate RISC-V SoC Verification with TileLink IP

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jan 16, 2023/3 min read

BLOG

Addressing the Verification Challenges of Panel Self Refresh in eDP

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Dec 17, 2022/4 min read

BLOG

Functional Safety in Automotive & Digital Ecosystems

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Dec 15, 2022/2 min read

BLOG

How to Achieve 2X Faster Waveform Dumping in Synopsys Verdi with VCS

By Taruna Reddy

Tags: Engineering Central, Debug, Simulation, Verification

BLOG Dec 11, 2022/2 min read

BLOG

Latest Updates on Arm AMBA ACE5-Lite Protocol

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Nov 27, 2022/3 min read

BLOG

Synopsys 10BaseT1-S VIP for your Automotive SoCs

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Nov 15, 2022/3 min read

BLOG

Exploring ML-Based Regression Failure Analysis

By Rob van Blommestein

Tags: Engineering Central, Debug, Verification

BLOG Nov 05, 2022/4 min read

BLOG

Learn About the Latest Arm AMBA AXI5 Features

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Oct 30, 2022/4 min read

BLOG

First Verification IP for Arm AMBA 5 CHI-F Unveiled

By VIP Expert

Tags: Engineering Central, Verification

BLOG Oct 15, 2022/3 min read

BLOG

Maximizing UFS 4.0 Authentication with Advanced RPMB

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Oct 03, 2022/2 min read

BLOG

Unified Emulation & Prototyping for Chip Development

By Tom De Schutter

Tags: Engineering Central, Verification

BLOG Sep 04, 2022/1 min read

BLOG

Synopsys VCS and VIP By-the-Minute

By Verification Expert

Tags: Cloud, Engineering Central, Simulation, Verification IP, Verification

BLOG Aug 22, 2022/5 min read

BLOG

PCIe 6.0 Verification of FEC and CRC

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Aug 01, 2022/5 min read

BLOG

Industry's First CXL 3.0 Verification Solution

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jul 06, 2022/5 min read

BLOG

Synopsys Protocol Verification Solution for UCIe 1.0

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG May 25, 2022/4 min read

BLOG

HDMI's Quick Media Switching

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Feb 13, 2022/2 min read

BLOG

Coverage Models – Filling in the Holes for Memory VIP

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jan 24, 2022/3 min read

BLOG

Faster Closure, Simulation Acceleration to Emulation

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jan 12, 2022/2 min read

BLOG

PCI Express 6.0: High Bandwidth Interconnect

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Oct 09, 2021/2 min read

BLOG

HBM3: The Next Generation Memory Standard

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Sep 21, 2021/3 min read

BLOG

Building Secure Chips with Verified CXL IDEs

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Aug 17, 2021/2 min read

BLOG

CXL Design V&V with Synopsys Protocol Continuum

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Aug 01, 2021/2 min read

BLOG

LPDDR5X - The Future of Mobile Memory

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jun 23, 2021/3 min read

BLOG

Reduced Blanking for Low Power, High Res Displays

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Jun 02, 2021/2 min read

BLOG

Memory Mapped Registers in CXL 2.0 Devices

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG May 30, 2021/1 min read

BLOG

AMBA®CHI New Features for Cache Coherent Verification

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Mar 31, 2021/1 min read

BLOG

Accelerate SoC Verification, Experts Available

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Feb 10, 2021/1 min read

BLOG

The Fascinating Path of CXL 2.0 Device Discovery

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

BLOG Nov 12, 2020/1 min read

BLOG

CXL: Secured Network Traffic Specification

By VIP Expert

Tags: Engineering Central, Verification IP, Verification

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Understanding Color Space Conversions in Display

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8K Ultra HD: A Giant Leap for HDTVs

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JEDEC Announces DDR5 SDRAM VIP for HPC

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Securing Network Traffic using MACSec Over Ethernet

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A New Generation of LPDDR

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BLOG Jun 10, 2020/2 min read

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Understanding Color Space in Display

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BLOG Jun 07, 2020/1 min read

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Accelerating NoC Verification via Automated Testbench

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BLOG Apr 20, 2020/2 min read

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VIP for AMBA CXS: Early Adopter Success

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BLOG Mar 15, 2020/3 min read

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256Gb/s Ready Set Go: PCIe Gen6 Verification IP

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BLOG Mar 11, 2020/2 min read

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DDR5 - Off and Running

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An Introduction to the CXL Device Types

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Simplify Entertainment with HDMI 2.1 eARC

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BLOG Jan 25, 2020/2 min read

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Deciphering the New TileLink Standard

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BLOG Jan 15, 2020/1 min read

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Optimizing HBM2E Runtime Performance

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BLOG Jan 14, 2020/1 min read

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The Power of HDMI ARC

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BLOG Dec 16, 2019/3 min read

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Ethernet 802.3ck: Welcome 800G and Terabit Speeds

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Demystifying PCIe PIPE 5.1 SerDes Architecture

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Managing NVMe Verification Complexity

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Arm AMBA5 CHI-D Verification IP

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BLOG Oct 23, 2019/3 min read

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Reduce Link Bring-Up Time with PCIe 5.0 Modes

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BLOG Oct 01, 2019/2 min read

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HBM Performance Verification Made Easy

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BLOG Sep 22, 2019/3 min read

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How to Reduce Memory Model Debug Time

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MIPI CSI-2 v3.0: Comprehensive 5G Imaging Solution

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De-mystifying CXL: An Overview

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BLOG Sep 09, 2019/3 min read

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NVDIMMs – A Perfect Blend of Memory and Storage

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BLOG Sep 03, 2019/1 min read

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USB4 Is Here – USB-IF Ratifies USB4 specification

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BLOG Aug 26, 2019/1 min read

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Ethernet TSN: A Boon for Automotive AVB Applications

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BLOG Jun 27, 2019/2 min read

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DisplayPort 2.0: 20Gbps, 16K & More

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BLOG Jun 24, 2019/2 min read

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GDDR6 for AI, VR, and Autonomous Driving

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Optimizing AI, IoT & Automotive with LPDDR5

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BLOG Jun 03, 2019/2 min read

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Signing off PCIe 5.0 Verification with Synopsys VIP

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BLOG Mar 19, 2019/3 min read

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USB4: Higher Performance and Combined Data

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DDR Generations: Memory Density and Speed

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8k UHD Displays for Emerging Technologies

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Dynamic HDR in HDMI 2.1 for TV and Mobiles

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Innovating Memory Standards with LPDDR5 IP & VIP

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BLOG Oct 31, 2018/3 min read

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HDMI: How Scrambling Enables Higher Data Rates

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BLOG Oct 24, 2018/4 min read

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PIPE 5.1.1 for PCIe 5.0, DP 1.4, USB 3.2, SATA

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BLOG Oct 10, 2018/2 min read

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CCIX Over PCIe: Faster Coherent Interconnects

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High Res Displays for Mobile, TV, PC & Auto

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BLOG Jul 30, 2018/2 min read

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PCIe 5.0 Demos: IP and VIP for AI

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BLOG Jul 09, 2018/3 min read

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DFI 5.0 for Higher Performance in DDR5/LPDDR5 Systems

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BLOG Jun 20, 2018/3 min read

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The Future of Gaming Displays

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Boost Debug Productivity of Serial Protocols

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High Capacity and High Performance Flash Memory

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BLOG Apr 23, 2018/2 min read

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BLOG Mar 27, 2018/2 min read

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MIPI M-PHY 4.1 – Preventing Data Loss in High Speed Mobility Devices

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HDMI 2.1: How it Became the Most Popular Display Interface

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High Speed Memory in Smart Phones: MIPI UniPro v1.8

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BLOG Mar 06, 2018/1 min read

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Overcoming USB Type-C Verification Challenges

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LPDDR5 Upgrades: Boosting IoT, AI & Image Processing

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Automated SoC Performance Verification: No More Bottlenecks

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BLOG Jan 29, 2018/3 min read

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Arm AMBA ACE5 and AXI5 Source Code Test Suite

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BLOG Jan 16, 2018/2 min read

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Boost SoC Performance with PCIe PIPE 4.4.1

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BLOG Jan 08, 2018/3 min read

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Understanding PCIe Spread Spectrum Clocking

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Optimizing PCIe PIPE Interface Power Management

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