Keeping pace with fast evolving specifications and addendums:
Industry first for all major specifications – IEEE802.1AS, IEEE802.1Qbu/IEEE802.3br, IEEE802.1CB, IEEE802.1Qav, IEEE802.1Qbv, IEEE802.1Qci, IEEE 172-2016, IEEE 1588 v1/v2. Synopsys VIP provides flexibility to preempt the preemptable queue at any desired point. It also checks and collects all these fragments in correct order on the receive side.
Capability to generate mix of CTAG over RTAG frames and other frames for 802.1CB verification. Tracks AVB credits (Idle/Send slope) on per queue basis, notifies the user if threshold is reached and help 802.1Qav verification. Dynamic configurability to open/close the gates for 802.1Qbv, Qci verification. Ability to generate various PTP v1/v2 frame types along with dynamic timestamps insertion.
Verification completeness and quality
Collaboration with standard bodies and partners. Thorough verification with silicon proven Synopsys IPs and easy to integrate Testsuite covering all major specifications for faster closure on Verification.
Uniform solution for various interfaces
Synopsys AVB/TSN support exist for all speed modes including RMII 10/100M, USXGMII. It also supports interface switching dynamically.
Coverage and Debug
Native Integration with Verdi Protocol Analyzer, trace files, debug ports, detailed error message. Built in extensive coverage model (with an option for extension to user) and Verification Plans help users to get more confidence on verification completeness.
Compliance and Certification
ISO 26262 functional safety compliant protocol verification process. Synopsys tools are certified to ISO 26262 ASIL D to accelerate quality and functional safety qualification.
Automotive Ethernet applications are driving the needs for faster and accurate data transmission features in the protocol. As we discussed, these fast evolving specifications have made the protocol verification process challenging, therefore Synopsys end-to-end protocol verification solutions for , AVB, Base T, and FlexE provide a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve accelerated verification closure of Ethernet based designs. Synopsys is collaborating with early customers and partners to extend the standard architecture for their next-generation designs with new features available now with latest specifications.
Synopsys VIP is natively integrated with the Synopsys Verdi® Protocol Analyzer debug solution as well as Synopsys Verdi® Performance Analyzer. Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. Synopsys transactors, memory models, hybrid and virtual solutions based on Synopsys IP enable various verification and validation use-cases on the industry’s fastest verification hardware, Synopsys ZeBu® emulation and Synopsys HAPS® prototyping systems.
To learn more about Synopsys Ethernet VIP and Test Suites please visit http://synopsys.com/vip