BLOG Jan 22, 2026/4 min read BLOG From Concept to Tape-Out: SiMa.ai Achieves Bug-Free A0 Silicon for Physical AI By Greg Sorber Tags: RTL Synthesis, AI & Machine Learning, Physical Verification, Prototyping, Emulation, About Synopsys, Physical Implementation, Interface IP, Energy-Efficient SoCs, Signoff, Customer Spotlight, Signal & Power Integrity, Design, Fusion Design Platform, HPC, Data Center, Processor Solutions, Silicon IP, Verification, Formal Verification
BLOG Dec 04, 2025/4 min read BLOG 3D Chips: Socionext Achieves Two Successful Tape-Outs in Just Seven Months By Shekhar Kapoor Tags: Multi-Die, RTL Synthesis, AI & Machine Learning, Test, 3DIC Design, About Synopsys, Physical Implementation, Interface IP, Foundation IP, Signoff, Customer Spotlight, Cloud, Silicon Lifecycle Management, Signal & Power Integrity, Design, Fusion Design Platform, 5nm and Below, HPC, Data Center, Silicon IP, Verification
BLOG Nov 25, 2025/3 min read BLOG Adapting Foundation IP to Exceed 2 nm Power Efficiency in Next-Gen Hyperscale Compute Engines By Andrew Appleby, Daryl Seitzer Tags: Data Center, Fusion Technology, Design, Fusion Design Platform, About Synopsys, 5nm and Below, Energy-Efficient SoCs, Foundation IP, HPC, Data Center, Silicon IP
BLOG Apr 15, 2025/3 min read BLOG Using AI to Accelerate Chip Design: Dynamic, Adaptive Flows By Rob van Blommestein, James Chuang Tags: AI & Machine Learning, Fusion Technology, Design, Fusion Design Platform, About Synopsys
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