Dhruv Garg is a Staff Engineer in the Verification IP team at Synopsys, specializing in the development of NVMe and CXL protocols from the past 5 years. He received his Bachelor of Technology degree in Electronics and Communication from Jaypee Institute of Information Technology, Noida in 2018 and Master of Technology degree in VLSI from National Institute of Technology (NIT), Jalandhar in 2020.
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