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Analog design has always stood apart as one of the most complex, craftsmanship‑driven disciplines in chip development.
For decades, analog layout has depended on deep individual expertise and domain knowledge, manual iteration, and highly specialized workflows. And for just as long, many analog engineers have held a healthy skepticism toward automation, believing the nuance, intuition, and constraints of analog design can’t be captured in software.
What once seemed impossible is now a reality.
Today, we are officially introducing the world’s first analog layout synthesis capability. Powered by AI, it delivers an entirely new approach that fundamentally reshapes what’s possible in analog design.
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Relieving a critical bottleneck
Analog circuitry sits at the heart of nearly every advanced system — AI accelerators, high‑speed interfaces, sensors, automotive intelligence, and beyond. But while digital design has scaled exponentially with Moore’s Law, analog has become a bottleneck.
It remains one of the last domains where progress depends on manual design, personal experience, and iterative trial and error. This work has become increasingly demanding as system complexity rises and advanced nodes add new sensitivities and layout‑dependent behaviors. All of this places even more pressure on the industry’s most limited resource: the skilled engineers who make analog innovation possible.
Analog layout synthesis provides much-needed relief.
A once-in-a-generation shift for analog design
Synopsys introduced logic synthesis to the world nearly 40 years ago. In doing so, we lifted digital design from manual implementation to an abstraction‑driven paradigm that changed the industry forever.
We’re now doing the same with analog layout synthesis.
A breakthrough feature within Synopsys ASO.ai and the Custom Compiler design environment, this industry-first capability uses AI to generate analog layouts. Rather than automating narrow tasks or speeding up existing scripts, it establishes an end‑to‑end flow that:
- Understands the designer’s intent
- Synthesizes complex constraints
- Crafts smart floorplans that can absorb late-stage engineering change orders (ECOs)
- Synthesizes technology-specific, design rule check (DRC)-clean layouts
- Executes layout-aware optimization for faster signoff
This represents an entirely new flow and level of automation — a shift from hard-to-maintain templates, complex scripts, and manual iteration to intelligent, scalable synthesis that internalizes best practices, learns from outcomes, and accelerates convergence.
Most importantly, this capability doesn’t replace analog designers. Rather, it amplifies and scales their expertise across teams and frees them to focus on innovation and higher‑value engineering decisions.
Proven outcomes across real customer designs
Five customers have already piloted the new flow and are now actively deploying it in their production systems — a milestone that speaks to both the readiness of the technology and the urgency of the problem it solves.
Across these early deployments, the results have been substantial:
- 3× faster analog layout implementation
- 3× fewer ECOs and design iterations
- Consistent, high-quality layouts across users
AI-synthesized analog layout produced by Synopsys Custom Compiler
Transforming analog design
We are preparing for the next phase of limited customer availability (LCA) in Summer 2026, partnering closely with leading analog teams around the world to continue refining and scaling this new flow.
Just as logic synthesis redefined digital design in the 1980s, we believe AI‑powered analog layout synthesis will set a new standard for what analog engineering can achieve.
Forty years ago, we transformed digital design.
Today, we begin the transformation of analog.
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