Will Felten

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Multiphysics Fusion Technology for Multi-Die Designs Explained

Unified multiphysics fusion helps multi-die teams validate earlier and sign off faster.

Automotive Executive Guide: Rethinking Automotive Development

A guide to virtualization in software-defined vehicles for automotive leaders.

Mastering AI Chip Complexity

This eBook explores AI chip design trends, challenges,
and strategies for first-pass silicon success.

From this Author

Industry’s First PCIe 8.0 Verification IP: Powering AI, HPC, Automotive, and LLM Storage Innovations

BLOG Jan 23, 2026/5 min read

BLOG

Industry’s First PCIe 8.0 Verification IP: Powering AI, HPC, Automotive, and LLM Storage Innovations

By Deepak Kumar Lnu, Will Felten

Tags: Engineering Central, AI & Machine Learning, Prototyping, Emulation, HPC, Data Center, Verification

Accelerating PCIe Gen6 L0p Verification for AI & HPC Designs using Synopsys VIP

BLOG Aug 18, 2025/5 min read

BLOG

Accelerating PCIe Gen6 L0p Verification for AI & HPC Designs using Synopsys VIP

By Deepak Kumar Lnu, Will Felten

Tags: Engineering Central, AI & Machine Learning, Verification IP, Automotive, HPC, Data Center, Verification

Will Felten is an R&D Engineer in the TPG, HW assisted verification group at Synopsys. He specializes in Verification IP, and has more than 15 years experience with PCI Express.

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