256Gb/s Ready Set Go: PCIe Gen6 Verification IP

VIP Expert

Mar 15, 2020 / 3 min read

Synopsys Industry’s First PCIe Gen6 VIP availability gives industry leaders a head start advantage for the verification of PCIe Gen6 based designs and meet time-to-market requirements with predictable quality. As PCIe Gen6 is the most significant and disruptive update to PCIe specification in the last decade, it is critically important and advantageous to start verification early and leverage Synopsys PCIe Gen6 VIP to deal with increased verification complexity as well as ensure backward compatibility with the prior generations through PCIe VIP Source Code Test Suite.


PCIe Gen6 verification IP diagram

Let’s look at some of the vectors driving the need for PCIe Gen6 standard and achieve increased bandwidth and I/O performance. According to PCI-SIG, I/O Bandwidth doubles every three years and PCI Express protocol is the key enabler for designing higher capacity systems generations after generations.


PCIe Gen6 speed comparison chart

Emerging applications such as AI, ML, and Autonomous driving are immensely data intensive. Application performance and quality of results critically depends on the richness of data and performance of the compute infrastructure. PCIe Gen6 provides a scalable speed upgrade to meet higher data throughput requirements of these heavy workloads processed by specialized CPUs and GPUs efficiently.

In addition, ever increasing performance requirements drives different approaches such as edge and distributed computing. PCIe Gen6 and other PCI Express based high performance interconnect standards such as CXL enables design of distributed and interconnected systems that are scalable. While PCIe Gen6 is the most significant and disruptive update in the last decade, it remains backward compatible therefore enables building the new infrastructure incrementally and in a cost-effective manner.

PCIe Gen6 technology overview

There are server storage technologies which utilize PCI Express extensively. High I/O throughput storage such as NVMe and SSD devices virtually localize the data for HPC nodes by making it accessible at an instant and maintain streaming rates with the help of PCI Express and Ethernet protocols. Hence speed boost provided by PCIe will significantly improve the functionality in the overall infrastructure. The disruptive nature of PCIe Gen6 specification will create new verification challenges for NVMe, SSD and other PCIe based storage technologies. Synopsys PCIe Gen6 VIP and Source Code Test Suite will help you address these challenges successfully.

Salient Features at a Glance

  • Double Bandwidth with Pulse Amplitude Modulation  
PCIe Gen6 PAM diagram

4 signal levels of PAM4 helps transmit twice as much data as NRZ without having to double the transmission bandwidth for PCIe 6.0


Pulse Amplitude Modulation diagram

Why Forward Error Correction (FEC)?

PAM4 signal is fragile by nature which would be compensated by using Forward Error Correction methodology. This is introduced by keeping in mind that data integrity is critical. Hence constant stream of error correction data will be supplied to make sure we do not lose time in re-transmitting the data. It will ensure low latency and bandwidth efficiency.

Why Flit Based Encoding?

As FEC can be used for fixed sized code words, hence Flits with length 256 bytes have been introduced which will be used for transmitting TLPs & DLLPs over the link. Framing tokens for STP & SDP will be removed for bandwidth efficiency. The Error Correction Code (ECC) bytes will be transmitted as a part of flit and they will be responsible for the protection of the entire flit including the CRC (Used to protect TLP and DLLP bytes).  Sync headers will be removed to reduce overhead for flits.

Synopsys has been an active contributor in PCIe space for more than a decade and has one of the largest teams of deep PCIe expertise in the industry. Synopsys has multiple work group members in PCI-SIG, has been one of the key contributors to the PCIe spec. and is also one of the board members of PCI-SIG. Synopsys delivered this week, Industry’s first Gen6 VIP release to the early adopters of the PCIe Gen6 specification. Synopsys was also first to market with PCIe Gen5 VIP.

Synopsys continues to provide Industry’s first and most comprehensive Verification IP solutions, please visit us https://www.synopsys.com/verification/verification-ip/pcie.html to learn about PCIe Gen6 and other leading Verification IP Solutions.

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