Accelerating Product Design from Silicon to Systems with Synopsys Tools Accelerated by NVIDIA

Jamie Gooch

Jul 27, 2026 / 4 min read

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Introduction

At DAC 2026, the design community is gathering around a familiar challenge with a new level of urgency: how to keep pace with the growing complexity of intelligent, software-defined products. System designers and architects are being asked to integrate more compute, memory, sensing, connectivity, and software into products that must perform reliably in real-world environments. Logic and circuit designers are pushing advanced-node and multi-die designs through increasingly demanding implementation and signoff flows. Validation engineers are expected to find more bugs earlier, while managers and executives must scale compute resources without allowing infrastructure cost or design-cycle time to spiral.

Synopsys is addressing this challenge by using NVIDIA accelerated computing to accelerate its AI-enabled electronic design automation, simulation, verification and multiphysics technologies. This is helping engineering teams rethink how products are designed and developed — from silicon to systems.

Accelerating the Chip Design Flow

EDA workloads are among the most compute-intensive tasks in engineering. From register-transfer level (RTL) simulation and digital implementation to circuit simulation, physical verification, library characterization, and signoff, every stage of the flow is under pressure from larger designs, tighter margins, more verification requirements, and shorter schedules. Advanced-node and multi-die designs amplify the challenge because implementation and analysis must account for more interdependencies across partitions, dies, packages, and systems.

Chart showing SPICE GPU acceleration results for analog and HBM design workloads, comparing CPU-only versus CPU plus GPU turnaround times

Figure 1: Synopsys has demonstrated SPICE GPU acceleration for analog and high-bandwidth memory (HBM) design workloads.

GPU acceleration is already proving valuable in several areas of the Synopsys portfolio. For example, SPICE GPU acceleration has improved analog design turnaround from 40 days on CPU to 5 days on CPU plus GPU, an 8X gain, and high-bandwidth memory (HBM) design from 29 days on CPU to just 44 hours on CPU plus GPU, a 16X gain. On a 3nm receiver design, we saw an 18X acceleration using four NVIDIA GPUs.

While not every task maps equally to GPUs, targeted acceleration can help relieve CPU bottlenecks and improve time to results for workloads that benefit from massively parallel compute. This creates an opportunity to increase design throughput while making infrastructure more efficient.

Computational lithography GPU acceleration

Figure 2: Computational lithography GPU acceleration.

There is also accelerated production momentum in computational lithography. Computational lithography GPU acceleration has progressed from 5X throughput in 2023 to 15X in 2024 and 30X in 2025, with more than 10 customers in production and deployment at the most advanced nodes.

Accelerations Beyond Chip Design

With more than 20 GPU-enabled EDA and multiphysics products, Synopsys is pushing the boundaries of innovation, empowering engineers to run more sophisticated analyses and bring designs to market faster — across materials modeling, multiphysics and photonics simulation.

For example, Synopsys QuantumATK uses NVIDIA cuEST to accelerate Gaussian-basis quantum chemistry simulations by up to 50X, while NVIDIA Blackwell accelerates machine-learned force-field simulations by up to 200X.

Ansys Lumerical FDTD 3D electromagnetic simulation software achieved a 10X speedup on NVIDIA GPUs when used within Synopsys’ Multiphysics Fusion solution for analog and photonic design.

Why Accelerated Engineering Matters Now

Traditional engineering methods were built for a world where design domains were more separated, and compute demand grew at a manageable pace. That world has given way to one where electronics, software, mechanics, thermal behavior, power delivery, electromagnetic effects, manufacturing constraints, and AI models all interact. The product is no longer only a chip, a board, a package, or a mechanical assembly. It is an intelligent system whose behavior must be understood across domains and across the full lifecycle.

That shift changes what engineering teams need from their design environments. Faster point-tool runtime is valuable, but not sufficient. Teams need accelerated workflows that preserve accuracy, scale across large workloads, integrate into production environments, and support higher-level co-design. Synopsys is applying NVIDIA accelerated computing to help engineering organizations move toward AI-powered, simulation-rich, digitally connected design flows.

From Point Acceleration to Platform-Level Impact

The larger opportunity is not simply moving individual jobs from CPUs to GPUs. It is building an accelerated engineering platform that can span multiple domains. Synopsys is expanding its silicon-to-systems platform with NVIDIA CUDA-X libraries, AI, physical AI and Omniverse technologies.

For EDA and systems engineering teams, that points toward a future in which simulation, verification, analysis, and design-space exploration can run at greater speed and scale, while connecting more closely to the system context in which silicon ultimately operates.

This silicon-to-systems perspective is especially important for products that combine advanced electronics with real-world physics. Automotive, aerospace, industrial, AI infrastructure, and robotics systems all require engineering teams to reason across chip, package, board, software, thermal, power, mechanical, electromagnetic, and environmental behavior. When these domains are validated too late, teams risk costly redesigns. When they are modeled and analyzed earlier, teams can make better architectural decisions and converge with greater confidence.

From Silicon to Systems, Faster

By combining its silicon-to-systems portfolio with NVIDIA accelerated computing, Synopsys is helping design teams accelerate product development without losing sight of accuracy, confidence, or real-world behavior. That combination matters because the products being built today are no longer simple collections of components. They are intelligent systems, and engineering them requires a new level of speed, scale, and integration.

As the DAC community looks ahead, accelerated engineering offers more than incremental runtime gains. It offers a path to earlier insight, broader exploration, more efficient verification, and more confident decisions across the full product lifecycle. From chips to systems and from systems to the real world, Synopsys and NVIDIA are working to help engineers design what comes next — faster.

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