In UCIe 1.0 only raw mode was supported for streaming protocol where UCIe was used for the transport layer only, but in the UCIe 1.1 specification flit formats are added for streaming protocol. These are optional formats that allow custom protocols to use 68B/256B/256B latency optimized flit adapter capabilities. The 1.1 revision adds support for CRC detection with 3-bit detection guarantee of any random error and corresponding replay buffer to reinitiate transaction for any CRC error for streaming mode.
The 1.0 specification limited the stack mux at die-to-die adapter to use the same protocol at both multiplexor inputs but with latest revision, the stack multiplexor supports a combination of protocols in a single UCIe instance. This allows bandwidth sharing at the die-to-die adapter between these protocols. The latest revision also allows asymmetric mode in streaming mode with allowed configuration as EP (end point) or RC (root complex) through software register programming.
With independent layer design, it also requires multiple verification topologies to support end to end verification. These topologies can support the design under test (DUT) in back-to-back mode with traffic generation from test sequencers or an interop DUT and VIP connection. For system verification, the most suitable topology is a full stack implementation where all layers can be stitched together to create a complete system. A typical verification environment to support such use cases is illustrated in Figure 1. With stack mux supporting multiple protocols the verification system will encapsulate CXL, PCIe and Streaming (custom) protocol to support all use cases.
For the physical layer, version 1.1 adds capabilities for x32 pin module for advanced package, whereas version 1.0 only supported x16 and x64 pin physical layer interface.
Additional compliance and test debug registers are added for interoperability testing requirement of UCIe DUT with a reference UCIe design (golden die).