Our chairman and co-CEO, Dr. Aart De Geus, will lead off the conference with his keynote address, “Catalysts of the Next 1000x,” at 9 a.m. PDT on March 30. We hope you’ll find inspiration in understanding how we can achieve another 1000x in complexity and another 1000x in chip design productivity to meet increasing demands for data capacity, compute speed, and lower power consumption. At 1:45 p.m. PDT on March 31, you can join a conversation with our president and COO, Sassine Ghazi. Panel discussions throughout the conference will cover topics including EDA on the cloud, opportunities for women in engineering, and a software-first approach to SoC verification.
Many of the presentations will take place live, and content will be available on-demand for 90 days after our event for registered attendees. This year’s tracks span an array of useful topics:
- AI and machine learning
- Analog/mixed signal
- Digital design implementation
- Low power
- Physical verification
- Security, defense & aerospace
- Silicon test & analytics
- Verification hardware
- Verification software
You’ll also have an opportunity to schedule one-on-one discussions with Synopsys experts and to meet with our sponsors through the interactive virtual environment. We look forward to seeing you online for SNUG Silicon Valley.
The Synopsys Users Group (SNUG) has brought together a global design community since 1991, with members united in their focus on innovation from silicon to software. The user conference has grown to become the electronics industry’s largest, typically drawing Synopsys tool and technology users from North America, Europe, Asia, and Japan. Additional events are being planned in Asia and Europe for the summer and fall. For details, visit our SNUG web page.