Cloud native EDA tools & pre-optimized hardware platforms
IMS is the flagship event in a week dedicated to all things microwaves and RF. The week also includes the IEEE MTT-S Radio Frequency Integrated Circuits Symposium (RFIC) and the Automatic Radio Frequency Techniques Group (ARFTG).
Visit Synopsys at IMS where we will be presenting our advanced solutions for RFIC design and Design Technology Co-Optimization (DTCO).
Session number - IWTU8
Date: 6/13/2023
Time: 3:40 - 5:20 PM
Room: 29D
Design Technology Co-Optimization (DTCO) of RF Power Amplifier Designs with GaN Device Technology
GaN HEMTs are leading candidates for high frequency high power amplifiers for 5G/6G base stations. TCAD simulation helps GaN device developers optimize epitaxial structure and layout parameters to achieve transistor DC and small signal (Ft) targets. The TCAD simulation generates I-V, C-V, S-parameter curves and large signal power sweeps. ASM compact model parameters are extracted from the TCAD simulation data, from which the PA circuit design is optimized with HB load pull simulation. The device-level insights into nonlinearity physics are revealed by Fourier coefficients of solution variables.
Session number - TUMA6
Date: 6/13/2023
Time: 10:45 -11:00 AM
Booth 2447
Modern Design and Verification Flow for Silicon RF & Millimeter Wave ICs
We will describe the Synopsys modern design and verification flow for Silicon RF and millimeter wave (mmWave) ICs. We will address the design of RF & mmWave IC components including 6 GHz Low Noise Amplifier (LNA), 28 GHz Power Amplifier (PA), and 28 GHz LNA using GlobalFoundries 22FDX and TSMC N16FFC interoperable process design kits (iPDK) with Synopsys Custom Compiler design/layout and PrimeSim circuit simulation tools, and with accurate electromagnetic (EM) analysis tools provided by Ansys and Keysight.
Session number - WEMA10
Date:6/14/2023
Time: 11:45 - 12:00 Noon
Booth 2447
CMOS SOI RF Design-Technology Co-Optimization
CMOS SOI technologies are ideally suited for RF and mmWave applications in 5G and emerging 6G bands owing to high integration in CMOS platforms and low parasitic capacitance relative to bulk CMOS. The Synopsys RF DTCO flow enables exploration and optimization of CMOS SOI transistor designs and process derivatives using RF/mmWave circuit figures-of-merit through a flow starting with TCAD process and device simulations to produce RF target data, whence a BSIM4-SOI SPICE model extracted for RF circuit simulation, thereby enabling rigorous optimization of the transistor design before committing to expensive wafer-based validation.
Date: Wednesday, June 14, 2023
Time: 2:00 - 2:30 p.m.
Join us at Ansys Booth #2135
5G/6G wireless communications drive RFIC designs on high volume CMOS process technologies. Synopsys, Ansys and Keysight will present how they teamed up with TSMC to develop a mmWave design reference flow for TSMC N16FFC process that streamlines the use of advanced CMOS technology for mmWave circuit designs. We will address the design of typical RFIC components including a 22.4 GHz LC-VCO, a 28 GHz Power Amplifier, and a 28 GHz LNA using Synopsys Custom Compiler™ design/layout and Synopsys PrimeSim™ circuit simulation products. These are tightly integrated with accurate electromagnetic (EM) analysis provided by Ansys Helic tools and Keysight RFPro.
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